nige
Newbie level 5
when I finished my LVS and see *.lvs report file, I found the dummy transistors usually causes some errors, and reports show the layout and schematic unmatched. I know these errors were not important, but affirming these errors also took me a lot of time. are there any good methods to deal with this problem?
by the way, I found after layout reduce, Dracula recognize some MOSFET as "PDW,SUP,PUP" and even "INV" in the *.lvs report. I didn't find any INV in the site *.lvs told me except a single MOSFET. what are "PDW,SUP,PUP"?Is there anybody can help me?
ps:I'm using Dracula and virtuoso to design a full-custom analog layout.
thank you!!!
by the way, I found after layout reduce, Dracula recognize some MOSFET as "PDW,SUP,PUP" and even "INV" in the *.lvs report. I didn't find any INV in the site *.lvs told me except a single MOSFET. what are "PDW,SUP,PUP"?Is there anybody can help me?
ps:I'm using Dracula and virtuoso to design a full-custom analog layout.
thank you!!!