aasif
Member level 2
hdl images
I want to write some Verilog/VHDL code for image processing. Writing simulator to verify the code is a difficult task. Can any image file (e.g. bmp, tiff etc) be the input of Verilog(/VHDL) source code, and after processing the image, the output image be stored as image file (In hardDisk)? So that by seeing the output image, the processing can be verified.
I want to write some Verilog/VHDL code for image processing. Writing simulator to verify the code is a difficult task. Can any image file (e.g. bmp, tiff etc) be the input of Verilog(/VHDL) source code, and after processing the image, the output image be stored as image file (In hardDisk)? So that by seeing the output image, the processing can be verified.