Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Measuring PSRR & CMRR of Opamp

Status
Not open for further replies.

Anachip

Member level 2
Member level 2
Joined
May 28, 2005
Messages
42
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,752
measuring psrr

Hi Guys,

How do I measure the CMRR and PSRR of a OPAMP in Cadence tool. Please explain me in detail the way of measurement of both this parameters.

Thanks
Anachip
 

measuring cmrr

for PSRR measurement
use unity gain opamp.fix the +ve i/p at analog ground.at VDD give ac 1V and run the simulation.trace the o/p in frequency domain.suppose at DC your o/p is -60dB,uour psrr is 60dB.u can consult the allen hollberg book.
please click the helped button if it really helped u.
 
  • Like
Reactions: ronello

    ronello

    Points: 2
    Helpful Answer Positive Rating
    V

    Points: 2
    Helpful Answer Positive Rating
measure cmrr

For PSRR simulation, generally superpose a ac signal source on the power source(ac source is series with power source), then do transient analysis, plot the Vac(the amplitude of ac signal source) and Vo ( the out of opa). From the wave of Vac and Vo,u can get Vac/Vo, its db value is psrr.
For CMRR simulation, u might refer to the picture.
 

psrr opamp

avinash

for PSRR measurement
use unity gain opamp.fix the +ve i/p at analog ground.at VDD give ac 1V and run the simulation.trace the o/p in frequency domain.suppose at DC your o/p is -60dB,uour psrr is 60dB.u can consult the allen hollberg book.
please click the helped button if it really helped u.

the positive input should be tied to ground? but then some transistors will be cutoff, since i use power supply from 0 to 3V. Up till now i always put common mode voltage in the +ve i/p. can i?
 

cadence psrr

Hi puyeng,

As avinash said, the +ve i/p is fixed at analog ground. In this case, it should be the common mode voltage which should make the input transistors stay in saturation.

Hope it helps you^_^

regards,
jordan76
 

measure psrr op amp

ow.. yap.. thanks jordan76

btw, may i ask some other questions in this topic?

i've been doing the PSRR simulation with definition: PSRR- = Av(vss=0)/Ass(vin=0)
it means that when i measure Av, i put ac signal at i/p +ve of unity gain op amp, and when i measure Ass, i put ac signal at the vss. is that the correct way of doing it?
what is the value of the frequency when people say psrr at high frequency?is it at GBW of the open loop op amp? what psrr value at GBW is considered high?
i need to improve the psrr of my op amp, but since it is most influenced by Av, i could not just implement the technique right away.

looking forward to the answers. thanks
 
Re: measure psrr op amp

ow.. yap.. thanks jordan76

btw, may i ask some other questions in this topic?

i've been doing the PSRR simulation with definition: PSRR- = Av(vss=0)/Ass(vin=0)
it means that when i measure Av, i put ac signal at i/p +ve of unity gain op amp, and when i measure Ass, i put ac signal at the vss. is that the correct way of doing it?
what is the value of the frequency when people say psrr at high frequency?is it at GBW of the open loop op amp? what psrr value at GBW is considered high?
i need to improve the psrr of my op amp, but since it is most influenced by Av, i could not just implement the technique right away.

looking forward to the answers. thanks

hi!
can you give me an example detail to plot PSRR transfer ?
i''l read a example in "CMOS Analog Circuit Design.2e.by P.E.Allen" but HSPICE dont' plot the transfer function of open-loop configuration of Opamp.
can you post a file detail .sp of SPICE ?
thanks !!
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top