Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

(basic) NMOS substrate connection

Status
Not open for further replies.
C

Caspar

Newbie level 2
Newbie level 2
Joined
Nov 17, 2005
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,296
Hi,

In an single nwell process, am I correct in assuming that all nmos devices have to have their body connected to vss (even if their source is not)? The bias current mirror device is currently in between vss and the common source of my input stage, so Vb != Vs. Is it better to make this p-type and connect the current mirror to vdd?

Thanks for your consideration,

Caspar
 

I don't get you...

If what I understood is correct, then you are biasing your stage with an NMOS current mirror. In this case, the MOS mirror operates with Vb = Vs = Vss. The biased NMOS pair however would have a higher Vth due to body effect ( which is usually not a big problem ).

Of course you can use PMOS pairs instead. this will have the advantage of a lower Vth ( and hence a higher common-mode input range ). However, this comes at the cost of lower gm of PMOS devices ( for same area as NMOS ). To get same gm from PMOS, you would need roughly 3 times the area of the NMOS pair.

I
 

    C

    Caspar

    Points: 2
    Helpful Answer Positive Rating
Thanks, I was thinking along this way but I wasn't sure. The extra area is not worth it..
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top