steven_arnold_85
Newbie level 5
pseudo random vhdl
Hello,
I asked a similar question earlier to this one except that I wanted to implement a pseudo random binary noise generator using physical hardware. That worked well.
Now I am wondering how I would go about implementing one on an EPLD. Does anyone know of where I might go about finding some code written in a form that can be implented on an ALTERA chip? I was hoping to write in VHDL. I am familiar with it so I was hoping someone could give me some code in that form.
Thankyou
Oh, for those of you that don't know, pseudo random is different to truely random in that if the generator is restarted, the exact same pattern of numbers will be "spat" out again. Truely random generators would produce a new set of numbers.
Hello,
I asked a similar question earlier to this one except that I wanted to implement a pseudo random binary noise generator using physical hardware. That worked well.
Now I am wondering how I would go about implementing one on an EPLD. Does anyone know of where I might go about finding some code written in a form that can be implented on an ALTERA chip? I was hoping to write in VHDL. I am familiar with it so I was hoping someone could give me some code in that form.
Thankyou
Oh, for those of you that don't know, pseudo random is different to truely random in that if the generator is restarted, the exact same pattern of numbers will be "spat" out again. Truely random generators would produce a new set of numbers.