cmos babe
Full Member level 4
Hey everyone,
My life story:
I've been lost within the user guides and reference manuals trying to figure out how to understand the timing related stuff in FPGA but I failed. For example, when I read the timing constraints in XST guide, there were references to things in the constraints guide, when I read the constraints guide thing I found more new terms then I started reading about TRACE and I got more confused.
My questions:
a) Why are timing constraints important ?
b) can a design work without them?
c) what's the starting point of understanding all these timing stuff, what are the main constraints that I should know well .
d) is there a step by step approach that I can follow to be sure that no hold/setup violations will occur?
I hope that the experts here help me because I will still have more questions and I'm working on a complex project..
Thank you all.
My life story:
I've been lost within the user guides and reference manuals trying to figure out how to understand the timing related stuff in FPGA but I failed. For example, when I read the timing constraints in XST guide, there were references to things in the constraints guide, when I read the constraints guide thing I found more new terms then I started reading about TRACE and I got more confused.
My questions:
a) Why are timing constraints important ?
b) can a design work without them?
c) what's the starting point of understanding all these timing stuff, what are the main constraints that I should know well .
d) is there a step by step approach that I can follow to be sure that no hold/setup violations will occur?
I hope that the experts here help me because I will still have more questions and I'm working on a complex project..
Thank you all.