holddreams
Full Member level 6
crystal oscillator circuit 20mhz
How to design a 20MHz crystal oscillator circuit with 50% duty cycle?
I use 0.5um CMOS Logic process,and choose the circuit like some papers said,
but the duty cycle of post-simulation result is not exactly 50%.
I add decoupling capacitor between VDD and VSS.
How can I control the duty cycle to 50%?
How long should I simulate the circuit?10u?20u?or else?
Once I simulate the circuit for 1.5ms,and the duty cycel change with time.....
Thanks.
How to design a 20MHz crystal oscillator circuit with 50% duty cycle?
I use 0.5um CMOS Logic process,and choose the circuit like some papers said,
but the duty cycle of post-simulation result is not exactly 50%.
I add decoupling capacitor between VDD and VSS.
How can I control the duty cycle to 50%?
How long should I simulate the circuit?10u?20u?or else?
Once I simulate the circuit for 1.5ms,and the duty cycel change with time.....
Thanks.