osbourne
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Hi,
I have connected an external clock to a global clock pin (GCLK) of the Virtex II 6000 FPGA. This clock is internally connected to a DCM to generate another clock (multiple of the external clock).
Now I want the DCM generated clock connect to a DAC as a sampling clock. Do I have to connect the internally generated clock (by the DCM) again to a GCLK pin or is it possible to connect outgoing clocks to a general purpose pin ?
I have connected an external clock to a global clock pin (GCLK) of the Virtex II 6000 FPGA. This clock is internally connected to a DCM to generate another clock (multiple of the external clock).
Now I want the DCM generated clock connect to a DAC as a sampling clock. Do I have to connect the internally generated clock (by the DCM) again to a GCLK pin or is it possible to connect outgoing clocks to a general purpose pin ?
