hitlgc
Newbie level 6
![Newbie level 6](/styles/images/ranks/blevel3.gif)
hi all
I want to design a CMOS buffer op amp. The Cl=90pF, input signal is a 30MHz pulse swing from 0v to 1.25v. The close loop gain is 4,Vdd is 12v.
Which structure is the best choice for my design?
thanks®ards
I want to design a CMOS buffer op amp. The Cl=90pF, input signal is a 30MHz pulse swing from 0v to 1.25v. The close loop gain is 4,Vdd is 12v.
Which structure is the best choice for my design?
thanks®ards