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setup and Hold time voilations

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sureshsirpurapu

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I am in search of a good docuent on setup and hold time voilations in the disign of clock for a digital system in an ASIC. some one please help
 

Refer to the above, there is a file downloaded which might be useful

regards
raghu
 
Hi
you can find a lot of text about set up hold on net. just try google
find attached a doc for understanding the timimng concepts. i hope it will be helpful
regards
 

setup and hold times depend s on the library cell which are given by foundy.
sewtup time says that the time before clock edge comes the data must be stable at the D input
hold time tells that the data must be stable for this time after the clock edge
 

even this might help u, as these are general searches in the net this would not bother much but still this is the main.

Added after 7 minutes:

sorry i could not download the file earlier please see it now,

regards raghu
 
thank you for the help raghu. the file gave me on timing considerations was of good help.
 

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