osbourne
Member level 2
Hi,
when I synthesize my VHDL design, I get the following message:
WARNING:HDLParsers:3498 - No primary, secondary unit in the file "D:/Xilinx/PD/carrier_add.vhd. Ignore this file from project file "dpd_vhdl.prj".
The design works correctly, but I don't know what this message means.
Can somebody help ?
Regards,
Osbourne
when I synthesize my VHDL design, I get the following message:
WARNING:HDLParsers:3498 - No primary, secondary unit in the file "D:/Xilinx/PD/carrier_add.vhd. Ignore this file from project file "dpd_vhdl.prj".
The design works correctly, but I don't know what this message means.
Can somebody help ?
Regards,
Osbourne