snoop835
Advanced Member level 4
![Full Member level 1](/styles/images/ranks/elevel1.gif)
- Joined
- Feb 7, 2005
- Messages
- 102
- Helped
- 6
- Reputation
- 12
- Reaction score
- 3
- Trophy points
- 1,298
- Location
- Penang, Malaysia
- Activity points
- 1,371
Hi guyz,
I am trying to understand the principal operation of Pipelined ADC. The architecture is attached. From this acrhitecture, within each stage the analog input is first sampled and held. Then it is coarsely quantized by a sub-ADC to resolve 2 bits. Then the output from sub-ADC will be converted back to analog value by using DAC and this output will be subtracted from the original input. This quantization error is then restored to the original full-scale range by an amplifier with gain 2.
I need to know in details why is this happening and how does the residues can represent the original analog input voltage?
Why we choose amplifier with gain 2?
When we say the quantization error is restored to the original full-scale range by gain of 2, what does it actually mean? (I'm confused!!)
I appreciate any comments.
Thanks in advance
I am trying to understand the principal operation of Pipelined ADC. The architecture is attached. From this acrhitecture, within each stage the analog input is first sampled and held. Then it is coarsely quantized by a sub-ADC to resolve 2 bits. Then the output from sub-ADC will be converted back to analog value by using DAC and this output will be subtracted from the original input. This quantization error is then restored to the original full-scale range by an amplifier with gain 2.
I need to know in details why is this happening and how does the residues can represent the original analog input voltage?
Why we choose amplifier with gain 2?
When we say the quantization error is restored to the original full-scale range by gain of 2, what does it actually mean? (I'm confused!!)
I appreciate any comments.
Thanks in advance