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what is wrong to cause the high insertion loss for hmc641LC4?

saulbit

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what is wrong with the insertion loss of hmc641lc4
--- Updated ---

Here is the datasheet for hmc641alc4
 

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Using signal generator and spectrum analyzer, you are looking for insertion losses in range 1.5dB to 4.7dB.
But the accuracy of spectrum analyzers usually is about +/-1dB, or even worse for cheap models.
I think you need a calibrated VNA for these measurements.
 
I agree regarding the VNA measurement.

But there are some issues with your PCB:
The cheap connectors plus this awful soldering are not appropriate for 18 GHz circuits.
The C61||C62 layout discontinuity is bad RF routing from a parasitics/controlled impedance viewpoint, and the components in parallel might create funny resonances with one of them becoming inductive above SRF.
 
I agree regarding the VNA measurement.

But there are some issues with your PCB:
The cheap connectors plus this awful soldering are not appropriate for 18 GHz circuits.
The C61||C62 layout discontinuity is bad RF routing from a parasitics/controlled impedance viewpoint, and the components in parallel might create funny resonances with one of them becoming inductive above SRF.
You are right! I just simulated the atc 600s 0603 high q ceramic capacitors using their s-parameters touchstone file, sadly found there is no capacitor can work from 3GHz to 18GHz. I took off all the ceramic capacitors in the rf lines with coil strips soldered in their original places. However, the insertion loss is much higher than 2dB, about 10dB for 18GHz.
 
The CMOS logic design and soldering resemble the insertion loss.

If you need a CMOS level shifter, get one.

1741809146181.png

and
You cannot do this. I think you want to change U29 to U27 .

Define your design spec 1st (level shifter)
then implement it, then validate that.
 
Last edited:
The CMOS logic design and soldering resemble the insertion loss.

If you need a CMOS level shifter, get one.

View attachment 197987
and
You cannot do this. I think you want to change U29 to U27 .

Define your design spec 1st (level shifter)
then implement it, then validate that.
This control circuit is working well. I am sorry that the sn14 means sn74lvc2g14dbv for a schmit not driver , and dual_hc04 means sn74lvc2gu04dbvr for a dual not gate. This control circuit is designed according to the datasheet of the hmc641lc4.
 
I knew it was a Schmitt Inv, just not the type.

It just did not make sense to have -5.1V logic going out as (?) +5V4
1742334369557.png
to the cathode
1742334311566.png


while the Anode is pulled down to -5V1 ? What kind of symbol is that D10/D8? Isn't it reversed? or even redundant?

If speed is important, why not use CML?
 

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