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Output resistance of current mirror - Simulation Setup

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melkord

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I usually use small signal formula to calculate output resistance (method 1).
But now want to find a simulation setup to measure it (method 2) so I do not need to input the expression of rout.
A good discussion I found from here and here.

I still do net get the same result between method 1 and method 2.
Could someone give me their correction to my setup?


Result.
1665411199785.png

The testbench.
1665411140483.png


The output transistors.
1665411109083.png
 

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M0 is in triode, I suppose that should be fixed first.

Then, are you sure you can use ±1.2V bipolar supplies here? It looks to me like those are 1.2V devices.
M1 Vdb might be way too high at the moment?
 

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solidstate said:
M0 is in triode, I suppose that should be fixed first.

Then, are you sure you can use ±1.2V bipolar supplies here? It looks to me like those are 1.2V devices.
M1 Vdb might be way too high at the moment?
Click to expand...

Here is the simulation result when both transistors are in saturation.
Still I got different results.
1665415798718.png

1665415727448.png
 

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solidstate said:
And how about the second point?
Click to expand...
The bulk is connected to -1.2V, that is not a mistake.
Here is the simulation when VBS of cascode transistor = 0V and VB of bottom transistor = 0V.
Still the results are not the same.
1665417876088.png
1665417831713.png
 

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Thanks! The small signal calculation looks reasonable. Not sure what is going on.
Could you try to remove L0, C0 and V0 (the current source), apply an AC stimulus to V1 and re-run the sweep? Then, take 1/i(v1) as your output impedance and compare?
 
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solidstate said:
Thanks! The small signal calculation looks reasonable. Not sure what is going on.
Could you try to remove L0, C0 and V0 (the current source), apply an AC stimulus to V1 and re-run the sweep? Then, take 1/i(v1) as your output impedance and compare?
Click to expand...

Still, they are different.
This setup seems make sense, but I do not understand where I did the mistake.

1665421347129.png


1665421289477.png



1665421263230.png
 

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solidstate said:
At this point, I also don't understand.
Can you annotate gds? It is worth checking that gds = 1/rout
Also, can you post the full schematic of Current_Source?
Click to expand...
Confirmed that gds = 1/rout.
The ideal opamp is from VerilogA.

1665439662265.png


1665439843393.png
 

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Oh boy... I hope you're not trolling? The gain of the amplifier improves the output impedance... search for regulated cascode or gain-boosting...

Here I was expecting to see some basic cascode bias stack...
 
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solidstate said:
Oh boy... I hope you're not trolling? The gain of the amplifier improves the output impedance... search for regulated cascode or gain-boosting...

Here I was expecting to see some basic cascode bias stack...
Click to expand...
Ooops..honest mistake. I am not trolling and was not aware that the output impedance was multiplied.
I know regulated cascode for TIA and didnt thought it is the same case here.
I will derive the small signal analysis tomorrow.
Thank you!
 
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No worries, glad we cleared it up.
One other thing you could look at is increasing the target Vds and/or the L of the bottom devices.
Right now, the Rout of your cascode is higher than that of the current source itself -- I think that's quite unusual.
 
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