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[SOLVED] Different transistor Types in TSMC 65nm

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ahmedatef0

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There are different types of nmos transistors in the PDK and I don't understand the naming for example there are nch_25_dnw & nch_25_dnw_mac.
  • I get that nch means nmos
  • 25 means transistor has OD_25 layer thus has a higher nominal voltage of 2.5v
  • dnw means deep n-well so that the transistor is isolated from the p-substrate(Triple well)
But I don't understand what does the mac stands for? I tried looking at the layout the "mac" had the exact same layout but with an extra layer called LVSDMY of purpose dm1, I think dm1 stands for dummy metal 1 but I can't get what is the main difference between 2 transistors and how to know which one to use.

Also some transistors are called nch_25_dnwod33 & nch_25_dnwud18, what does the overdrive and underdrive mean and what does the 25 and 18 mean?
 
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_mac devices have statistical mismatch modelled in them. Otherwise, they are exactly the same as the regular devices.

od33 devices will allow a 3.3V operation as compared to 2.5V in _25 devices case. This comes with a cost of higher minimum length of 500nm.

ud18 devices allow you to reduce the minimum length to 180n or 230n (don't remember exactly) provided that you guarantee that the device is operated as 1.8V operation.
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Usually, TSMC processes have separate devices to simulate mismatch. That's why you have the "_mac" in those devices. There must be an option (tsmcPdkUtilitytool) for you to automatically change the regular devices to _mac (in the main window). You can simulate and layout with both devices, there is no difference.
 
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_mac devices have statistical mismatch modelled in them. Otherwise, they are exactly the same as the regular devices.

od33 devices will allow a 3.3V operation as compared to 2.5V in _25 devices case. This comes with a cost of higher minimum length of 500nm.

ud18 devices allow you to reduce the minimum length to 180n or 230n (don't remember exactly) provided that you guarantee that the device is operated as 1.8V operation.
 
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Solution
AMS012 said:
_mac devices have statistical mismatch modelled in them. Otherwise, they are exactly the same as the regular devices.

od33 devices will allow a 3.3V operation as compared to 2.5V in _25 devices case. This comes with a cost of higher minimum length of 500nm.

ud18 devices allow you to reduce the minimum length to 180n or 230n (don't remember exactly) provided that you guarantee that the device is operated as 1.8V operation.
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Thank you sir, if I might ask another question about resistors what is the difference between rm6 rm6x rm6z? All three have the same layout but rmz has smaller Rsquare how is this done with no difference in layout
 

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These rm's are metal resistors. There are nothing but the metal wires that you draw in layout. They have been made into instances called rm1, rm2 etc. for ease of usage in schematic/layout sims. Usually, the first (bottom most) metal layer/s are called x-metals, and the top metals (the top 2) are called z metal layers. And as the top metal layers are thicker, so are they resistivity lower. For example in tsmc65 with 7 metallization, metal-1,2 can be called x-metals (metal-1 is Mx and metal-2 is My to be specific), and M6 is called Mz and M7 is UTM (Ultra Thick Metal). These are all just nomenclature for ease of documentation and usage, vary with the number of metals there are in the process, and have no other significance.

However, I am not sure how there are both x and z versions for the same metal 6.

This might be useful in this regard: http://www.vlsi-expert.com/2017/10/metal-layer-stack-metallization-option1.html
 
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