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High speed PHY IC without Fiber

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Dummyeng

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Might dig for app notes and eval kits which may offer
a Gerber file.

Looks like a gigabit-ethernet chip and this probably
wants at least high quality cable & connectors, maybe
the "Cat7" types mentioned in the DS. But really that
is about the path from/to and not the chip itself. You
have to budget the attenuation, crosstalk etc. against
the distance given the cable & connector (&PCBs)
qualities.
 

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Hi,

Did you contact the manufacturer? Mayby you need to sign an NDA before getting more detailed informations.

Klaus
 

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but i couldnt find any reference manual that can lead me to design for example evaluation board
The PHY has an ARM uP and a Flash i/f. :oops:
Just wondering about the cost......an eval board with such a PHY will be difficult to find. The total cost of the dev board will significantly increase due to the use of this PHY.

about spi pins i dont understand why i should use them
It is most probably for the Flash interface.
 

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i couldnt find anything
i wanted to refer to 88e1512 but it use SIN,P for sfp port so i couldnt refer to them
about pcb design i dont have problem because we design sfp+
but my problems are for example
can i use xc7z045 for it or not
or should i use gtx/h pin like 88e1512 or i can use pl pins
and ...
and i know they wont give me more detailed
i dont know why they dont release more info
one of my friend told that it seems that they only want to share info with motherboard factory i dont know
 

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@Dummyeng ,
can i use xc7z045 for it or not
I think you can use the xc7z045, it is nothing but a Zynq based FPGA.

Now as I see that this PHY has an SGMII i/f to connect to the Host, so the Link layer core i/f inside the FPGA should be SGMII compatible.
This IP from Xilinx could be of interest to you so as to implement the Link layer along with this PHY - https://www.xilinx.com/products/intellectual-property/do-di-gmiito1gbsxpcs.html

Note - I do not think any Link link layer Ethernet IP from Xilinx supports 5G (my knowledge may be outdated). You have support for 10/100/1000 + 2.5G and then 10G or higher speed IP cores.

If you really want to use this PHY, the most imp task would be to sign the NDA and get the elaborated docu.
 

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    Dummyeng

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SPI, from datasheet (firmware) -

1620303283907.png



Regards, Dana.
 

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I don't know of any Ethernet PHY manufacturer that doesn't require an NDA to get their documentation (unless it is on some antiquated 10/100 PHY). It's pretty much a given that you will need to sign an NDA before you get access to any useful design information.

I suspect the companies use this to determine how serious a potential customer is in using their part.
 

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