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Will MOSFETs stay OFF if their gate_source voltage is not driven to zero volts?

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zenerbjt

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Hi,

In the attached Back-to-back NFET circuit, the NFETs are initially turned off by the minus 3v source…but then the switch opens and the gates are just left floating. Will the NFETs stay OFF?....or is there a chance that background electromagnetic fields could induce them to come ON?

LTspice sim and PDF schem attached
 

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you only have to get below Vgs - threshold for them to be essentially off, however this varies with temp

if you leave the gate floating below Vgs-thres any rising voltage D-S will capacitively induce volts on the G-S turning the mosfet on - simple leakage currents can do this too,

A 10k resistor G-S will keep the thing off except for faster rising D-S impulses

A very low Z short is needed to keep it off for say 0 -> 400V in 30nS on the D-S

so it's horses for courses ...
 
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    Z

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Hi,

in additionl to the resistor suggested in the previous reply, you also may include a capacitor in parallel. This capacitor should be large enough compared to the gate to drain capacitance \[{C}_{GD}\] of your MOSFET. This capacitor will create a capacitive voltage divider with the gate to drain capacitance. By choosing this capacitor \[{C}_{ p}\] lets say a decade lager than \[{C}_{GD}\], it will represent a low impedance in cases of fast disturbances. Thus, preventing an unintended turn of of the MOSFET. By including the capacitor, the use of a parallel resistor is mandatory to avoid the buit up of charge/gate-voltage (charging \[{C}_{p }\]). Of course, this approch depends on your required turn-on and off time, as \[{C}_{p}\] will introduce a time delay.

Have a look at [1] to estimate the required capacitances from your MOSFET datasheet.

[1] https://www.infineon.com/dgdl/mosfet.pdf?fileId=5546d462533600a4015357444e913f4f

BR
 
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