shmoib
Junior Member level 3
xilinx rtl schematic alias
dear all,
when i run synthesize for my VHDL code and check its RTL schematic on ISE6.2i i found some blocks called 'ALIAS', does that mean anything wrong?
i attached the RTL schematic
dear all,
when i run synthesize for my VHDL code and check its RTL schematic on ISE6.2i i found some blocks called 'ALIAS', does that mean anything wrong?
i attached the RTL schematic