Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Driver design of the power amplifier

Status
Not open for further replies.
O

OZZAA

Member level 1
Member level 1
Joined
Feb 10, 2020
Messages
33
Helped
0
Reputation
0
Reaction score
0
Trophy points
6
Activity points
325
I want to design a PA with 2 stages (Driver (Cascode topology) and the main PA (Common source)) to give for example maximum power equals 30 dBm (@10 GHz) with overall gain 15 dB.
I calculated the aspect ratio of the transistors of the main PA to be in class AB.
its S21 is about 6 dB.
How I can choose the aspect ratio of the driver stages to feed the main PA properly.

I know I have to make the gain of the driver stage (s21) equals 9 to give the overall gain equals 15 dB.
and what is next?
you can assume any output and input resistances and any other wanted data, I just want the concept.

Thanks in advance
 

OZZAA said:
I want to design a PA with 2 stages (Driver (Cascode topology) and the main PA (Common source)) to give for example maximum power equals 30 dBm (@10 GHz) with overall gain 15 dB.
I calculated the aspect ratio of the transistors of the main PA to be in class AB.
its S21 is about 6 dB.
How I can choose the aspect ratio of the driver stages to feed the main PA properly.

I know I have to make the gain of the driver stage (s21) equals 9 to give the overall gain equals 15 dB.
and what is next?
you can assume any output and input resistances and any other wanted data, I just want the concept.

Thanks in advance
Click to expand...

you need to design driver with the output power that is needed at the input of your second stage --> Pout 1dB (driver) = Pin (PA)

Then you will find optimum ZL and you have optimum Zs for your main PA you have found from source pull
design a matching circuit that matches ZL(driver) to Zs* (PA)

pick class B for driver for having better efficiency even class C since you dont need high output power.
 
  • Like
Reactions: OZZAA

    O

    OZZAA

    Points: 2
    Helpful Answer Positive Rating
you need to design driver with the output power that is needed at the input of your second stage --> Pout 1dB (driver) = Pin (PA)
Click to expand...
you mean that, if the OP1dB (output power of 1 dB compression point) of the main PA occurs at Pin (IP1dB compression point) = 6 dBm.
I have to design the driver where its OP1dB at 6 dBm (the IP1dB of the main PA) ????
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top