Clock domain crossing problem

ThisIsNotSam said:

Why not simple synchronizers?

Click to expand...

biju4u90 said:

This is an interview question I found:
I have three clock domains A, B and C.
I have some data coming from clock domain A and clock domain B.
I want to do some combinational operation and send the resulting data to clock domain C.
How can I do this?

Click to expand...

swabhi812 said:

1. You cannot simply synchronize data from clock domain A and B to clock domain C and then perform the combinational operation. This will result in classic problem of re-convergence. With synchronizers you cannot guarantee that data will be sampled in 2 clock cycles (assuming double flops for synchronizers). There can be delay. Hence, when output of 2 synchronizers re-converge at a combinational logic, you cannot guarantee that it is functionally correct.
2. Because of #1, you will have to sample data from clock domain A to clock domain B (i.e add synchronizer from A->B), then perform combinational logic operation. Now one more problems arise. You cannot simply synchronize data of combinational logic to clock domain C. Combinational logic in front of synchronizer might result in glitch to be sampled (again functional problem)
3. Because of #2, you will have to add a flop to output of combinational logic (clock of course from B). Now you are good to add synchronizer to move to clock domain C.

Let me know if you have any more questions.

Click to expand...

ThisIsNotSam said:

while all of this is true, OP's question is so vague that I don't know if it applies. I mean, why would you have any output to be combinational to begin with? This is frowned up.

Click to expand...

swabhi812 said:

1. You cannot simply synchronize data from clock domain A and B to clock domain C and then perform the combinational operation. This will result in classic problem of re-convergence. With synchronizers you cannot guarantee that data will be sampled in 2 clock cycles (assuming double flops for synchronizers). There can be delay. Hence, when output of 2 synchronizers re-converge at a combinational logic, you cannot guarantee that it is functionally correct.
2. Because of #1, you will have to sample data from clock domain A to clock domain B (i.e add synchronizer from A->B), then perform combinational logic operation. Now one more problems arise. You cannot simply synchronize data of combinational logic to clock domain C. Combinational logic in front of synchronizer might result in glitch to be sampled (again functional problem)
3. Because of #2, you will have to add a flop to output of combinational logic (clock of course from B). Now you are good to add synchronizer to move to clock domain C.

Let me know if you have any more questions.

Click to expand...

swabhi812 said:

1. You cannot simply synchronize data from clock domain A and B to clock domain C and then perform the combinational operation. This will result in classic problem of re-convergence. With synchronizers you cannot guarantee that data will be sampled in 2 clock cycles (assuming double flops for synchronizers). There can be delay. Hence, when output of 2 synchronizers re-converge at a combinational logic, you cannot guarantee that it is functionally correct.
2. Because of #1, you will have to sample data from clock domain A to clock domain B (i.e add synchronizer from A->B), then perform combinational logic operation. Now one more problems arise. You cannot simply synchronize data of combinational logic to clock domain C. Combinational logic in front of synchronizer might result in glitch to be sampled (again functional problem)
3. Because of #2, you will have to add a flop to output of combinational logic (clock of course from B). Now you are good to add synchronizer to move to clock domain C.

Let me know if you have any more questions.

Click to expand...

stanford said:

in #3, you cant just add synchronizers if you the data is multibit.

Click to expand...