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LNA Design - Unable to get Gain from the circuit

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sgrjuneja

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I am designing LNA for GPS application (1.57GHz) using cadence virtuoso (IC616) and Spectre (MMSIM131) tool. Circuit is attached.

My topology is inductive source degeneration. I am able to match the input and output of LNA to 50 Ohms input and output port respectively with S11 = -18dB and S22 = -10dB. My noise figure is 2.4dB at the frequency of interest.

But the problem is I am not been able to get any gain out of the circuit. My S21 is always coming equal to S22 and it is -2.5dB. Please help me understand what could possibly be wrong with the circuit.

DC parameters/bias points for my gain transistor are as follows:-
Gate Over Drive Voltage - 0.12V, Id = 5.69A, Vgs = .608V, Vds = .605V, Vth = .558V, gm = 81m, gds = 2.14m, Cgs = 548Ff
 

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5.69A? Wow. I think it is 5.69mA. Anyway, I can't believe your output is matched well, you have a 50Ohm port as load. This circuit should have a high resistive output impedance, and it should behave as a voltage amplifier. If you want to match it with 50Ohm port, you should use a transformer at the output. That will match the output impedance and will convert the high voltage gain to a power gain, what S21 represents.
 
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    sgrjuneja

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    wypopo

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I am designing LNA for GPS application (1.57GHz) using cadence virtuoso (IC616) and Spectre (MMSIM131) tool. Circuit is attached.

My topology is inductive source degeneration. I am able to match the input and output of LNA to 50 Ohms input and output port respectively with S11 = -18dB and S22 = -10dB. My noise figure is 2.4dB at the frequency of interest.

But the problem is I am not been able to get any gain out of the circuit. My S21 is always coming equal to S22 and it is -2.5dB. Please help me understand what could possibly be wrong with the circuit.

DC parameters/bias points for my gain transistor are as follows:-
Gate Over Drive Voltage - 0.12V, Id = 5.69A, Vgs = .608V, Vds = .605V, Vth = .558V, gm = 81m, gds = 2.14m, Cgs = 548Ff

Id = 5.69mA. Sorry for the typo error.
 

Hi, Thank you for your reply.

Yes, Id is indeed 5.69mA. Sorry for the typo error.

You are right, I am using parallel LC tank circuit at the cascade transistor that will offer infinite impedance and i am matching it with output port with 50Ohms resistance. Thank you very much.

I request one more help. I have never used transformer for impedance matching. Could you give little bit of explanation on how it can be done? looking forward to hearing from you.
 

First, what will be your output load of the LNA? A discrete circuit outside the package or a circuit inside a chip? If you are using a mixer for example inside a chip, your LNA's output doesn't have to be matched.
On a chip the distances are much smaller than the used wavelength (which is 191mm in your case), so reflection between the LNA and the internal mixer is not significant.
Internal mixers usually have high input impedance too, thus you don't need to know S21, it is enough to know the voltage gain of your LNA. And you don't need transformer and second 50Ohm port at the output either.
Use simple AC simulation to calculate voltage gain and the real load of your circuit.
If you have got a mixer outside the package it is more problematic...
 

    wypopo

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Hello Sir, Frankly speaking I am just trying to build (simulate) LNA and obtain the S parameters and power gains. I have not given a thought to what my actual load will be.
If i need to get S21, what needs to be done.
Regarding AC simulation - if i connect any high impedance load (lets say 1MOhms resistor) in the output and do the AC simulation will i get the gain? Is that what you are suggesting?
Looking forward to hearing from you.
 

Yes. Actually capacitive load is close to the reality also, I would use that. There are always some capacitance, and pure high resistance load is not general in CMOS circuits. Bias of an active mixer can be resistive load, but that is not in the MOHm range usually.
 

you can also use a vcvs at output ,then link to port
 

Hi Thank you for your suggestion. Could you please give me a topology on how it needs to be done.
 

The LNA is in chip? link to mixer?if the next stage is mixer ,you can use a vcvs to isolate port with 50 ohms from the LNA,because it needn't to be matched.then you can get the voltage gain.you can connect output wire to the vcvs's positive input ,the vcvs's negative input just connect to gnd,vcvs's output connect to port with 50 ohms,of course,negative output should connect to gnd. it is only my understand.
 

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