Differential amplifier operating point

I am trying to find the operating point of a differential amplifier. What is the right procedure i should follow? Should i ground the inputs and do a BIAS point analysis? Or should i do a DC sweep on one input?

Thanks in advance for any suggestions!

Hi
Before you do any simulations I think you need to understand how the circuit works. In this case how the differential amplifier, and how MOS transistors work. If you are a self-taught and you need some guidance there are a few great books for beginners: "Analysis and Design of Analog Integrated Circuis - P. R. Gray" , "Desing of Analog CMOS Integrated Cirbuits - B. Razavi", "Microelectronic Circuits - Sedra", "Analog Integrated Circuit Design - Kenneth Martin" and may others.

If you are a student you can learn a lot of things by paying attention to class.

If you desing a differential amplifier like the one in your picture, you must make sure that the transistors work in saturation. If we asume that they obey the simple square law, this happens when the two following conditions are met:
1) The drain voltage is larger than the gate voltage - threshold voltage (VD>VG-Vth).
2) The gate-source voltage is greater than the treshold voltage (VGS > Vth).

Since Vth of an NMOS transistor is positive (assuming it is an enhancement mode MOS) it is clear that when you ground the imputs the circuit will not work as a differential amplifier. The transistors will be blocked.

A common method is to bias the gates of the input transistors to half the supply voltage - (VDD-VSS)/2. Since in your picture VSS=0 The input voltage will be VDD/2, but you have to make sure that the transistors remain in saturation.

extremis said:

I am trying to find the operating point of a differential amplifier. ... should i do a DC sweep on one input?

Click to expand...

Connect a DC (not an ac) source to both inputs and run a DC sweep analysis (say between 1 .. 3V). Then plot the output voltage(s) vs. the swept input voltage to find the suitable input bias voltage for an adequate output voltage (≈3V).

A saturated Mosfet is the opposite of a saturated bipolar transistor. The saturated Mosfet is an amplifier but the saturated bipolar transistor is a switch that is turned on.

In your circuit the Mosfets must be matched which occurs if they are in one monolithic IC or selected from thousands of them. But even matched Mosfets are a little different from each other so their operating point will be affected by the differences.

Thanks everyone for helping me out!

I have biased the gates of input transistors to VDD/2 = 2.5V; however i am not sure the transistors remain in saturation mode. L=5u, W=20u for both transistors. Here is the output of Pspice (9.1 student version):

NAME M_M1 M_M2
MODEL MbreakND MbreakND
ID 6.53E-05 6.53E-05
VGS 9.33E-01 9.33E-01
VDS 1.68E-01 1.68E-01
VBS -1.57E+00 -1.57E+00
VTH -4.00E+00 -4.00E+00
VDSAT 4.93E+00 4.93E+00
Lin0/Sat1 -1.00E+00 -1.00E+00
if -1.00E+00 -1.00E+00
ir -1.00E+00 -1.00E+00
TAU -1.00E+00 -1.00E+00
GM 1.35E-05 1.35E-05
GDS 3.81E-04 3.81E-04
GMB 0.00E+00 0.00E+00
CBD 0.00E+00 0.00E+00
CBS 0.00E+00 0.00E+00
CGSOV 0.00E+00 0.00E+00
CGDOV 0.00E+00 0.00E+00
CGBOV 0.00E+00 0.00E+00
CGS 0.00E+00 0.00E+00
CGD 0.00E+00 0.00E+00
CGB 0.00E+00 0.00E+00

Click to expand...

Threshold voltage seems really weird (Vth = -4V), i expected something like +0.6V. With such a threshold voltage, VD>VG-Vth does not hold true, no matter what the input bias voltage is.

Next, i performed a DC sweep analysis with common mode voltage 0...5V, but output voltage is lower than 1.85V. Is there anything i have missed?


Thanks again,
Kostas

extremis said:

... Threshold voltage seems really weird (Vth = -4V), i expected something like +0.6V. ... Is there anything i have missed?

Click to expand...

Right. Are you sure that your "G" potential is 0V=GND ? It should be!

extremis said:

Threshold voltage seems really weird (Vth = -4V)

Click to expand...

* Vary the upper (positive) and lower (negative) supply voltages, until you notice the output changing in response to the input.

* To keep it simple, make both input waveforms centered around 0V.

* Make the left input frequency different from the right input frequency. When you see both frequencies in the output, you have found a good operating point for your differential amplifier.

The MOSFET looks like a depletion MOSFET of even a JFET.
If indeed it is a JFET then grounding the gates will give you the operating point of the circuit.

Yes, indeed, MBreakN4D is a N channel depletion type MOSFET. Therefore, Vth = -4V is not so weird after all: depletion type MOSFETs are on without any voltage applied to the gate. In order to find the transition point to saturation mode, i have performed a DC sweep analysis and have plotted VDS and VGS+4. If i am not mistaken, the transistor is in saturation mode for VGS < -1.6V; i have chosen VGS = -2V as my BIAS voltage as this gives a nice output voltage of around 2.95V.

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[Moderator's note: Member advises to ignore next paragraph, after discovering error in his calculations.]

However, now i have a new problem: i have calculated common mode gain and it is Acm = -1.2! Previously, with VGS = 1V, Acm was just -0.1. Adm has remained roughly the same, so CMRR is now more than 10 times lower. I calculate Acm with the following procedure: i have applied exactly the same BIAS voltage and signal at both inputs and measured the output voltage at the right MOSFET, taking Acm = Vout/Vin. Is this the right procedure i am following? If so, why Acm is higher in saturation?