ft of HBT transistor and Class A operation

Dear All,


I have seen some papers on power amplifier design. They are biasing the transistor near their peak ft and saying that transistor is biased near class A operation region. I did not understand conceptually that if we bias the transistor near their peak ft then, we are in class A region. How is the the different biasing classes related to ft ? what if we want to design class B then how to decide on biasing point vs ft.

The title of papers are
1) A 110–134-GHz SiGe Amplifier With Peak Output Power of 100–120 mW.

2)A Wideband High-Efficiency 79–97 GHz SiGe Linear Power Amplifier with > 90 mW Output.

Any explanation is most welcome.

It is possible to increase bias to class B so the bias is continually ON. Then each transistor is operating more like class A. However this wastes power.

There is something interesting that you can do with class A. As you raise the bias in class A, you increase DC gain, and also any AC signal riding the DC voltage. It's a means to obtain maximum power (as long as you avoid clipping.)
Class A offers low distortion. CLass A is easy to work with because you only have the single bias to care about.

Class B is more complicated. It has two transistors which alternately turn on & off (in simple terms). You need to care about matching gain of two transistors, and applying two biases, adjusting two biases, etc.

There is a probably a misunderstanding.There is no relationship between class of an amplifier and fT.Class of an amplifier is related to its bias point.( essentially conduction current )
fT is almost function of DC current of the transistor and it rises by current increasing then reaches a peak after that drops smoothly.Therefore there is optimum current for max. fT
I guess they meant to say.

BigBoss said:

There is a probably a misunderstanding.There is no relationship between class of an amplifier and fT.Class of an amplifier is related to its bias point.( essentially conduction current )
fT is almost function of DC current of the transistor and it rises by current increasing then reaches a peak after that drops smoothly.Therefore there is optimum current for max. fT
I guess they meant to say.

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I asked the author of the paper and he mentioned that if you are biasing the transistor at high biasing current then you are automatically in class A operation region otherwise you can be in class AB, B or C.

In 0.13um SiGe process the IHP has not specified the maximum current of transistor. They said for optimum results from the transistor you can bias the transistor near peak ft current density. I want to design Class AB or B power amplifier using ft versus biasing current plots. I do not know how to design the class B power amplifier without knowing maximum current of the transistor.

Actually, IHP gives the current density at maximum ft in their datasheets, and consider your dc collector current at "class b", you'll suffer from a very low ft. It's very useful to simulate ft. vs ic. By the way, in the PDKs of IHP, there are a lot of diagrams with plots of ft,fmax vs. ic

I tried to design the PA in class B operation region. It seems at high frequency the transistor has almost no gain in Class B region. That is why people are biasing the transistor near peak ft.

searchforknowledge said:

I tried to design the PA in class B operation region. It seems at high frequency the transistor has almost no gain in Class B region. That is why people are biasing the transistor near peak ft.

Click to expand...

Class-B amplifiers are not generally designed as single ended.Instead, practical Power Amplifiers are designed as Class-AB Push-Pull configuration.Ft is found to be as function of DC current and you should plot Ft vs. Idc in a simulator.If you use Cadence ADE Spectre, you may use calculator utility to plot this curve.

I prepared a test-bench for you in Cadence ADE by using Spectre simulator.If you abel to access to this simulator, you can do the same thing to find the FTmax.
As you see, FT has a max. value where the Collector/Base current is optimal.You can use this function to find the max. FT.

This is FT. vs Ibase ( of course Icoll) curve of BFP420 of Infineon and it has exactly FTmax ( 25GHz) as mentioned in its datasheet

searchforknowledge said:

I tried to design the PA in class B operation region. It seems at high frequency the transistor has almost no gain in Class B region. That is why people are biasing the transistor near peak ft.

Click to expand...

Exactly, RF PAs are mostly biased in weak class AB in a push-pull configuration for linear PAs

I am sorry for so late reply. I was checking the threads again and found your simulation in Cadence. I did the simulation for ft/fmax in ADS. However, I got ft/fmax greater than the one specified in the IHP design kit. There is about 70-80 GHz difference. I think at frequency the model becomes invalid so we can not use the formulation at high frequency. We have to extract the ft/fmax using some low frequency. By the way, I have the design kit with ft/fmax 300/450 GHz.

BigBoss said:

I prepared a test-bench for you in Cadence ADE by using Spectre simulator.If you abel to access to this simulator, you can do the same thing to find the FTmax.
As you see, FT has a max. value where the Collector/Base current is optimal.You can use this function to find the max. FT.

This is FT. vs Ibase ( of course Icoll) curve of BFP420 of Infineon and it has exactly FTmax ( 25GHz) as mentioned in its datasheet

Code:

unityGainFreq(mag((IF("/Q0/C") / IF("/Q0/B"))))]

View attachment 136213View attachment 136214

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Hi BigBoss,
I'm Kim. I am a student want to learn about bipolar characteristics. I want to ask you about your simulation to measure ft. I do under your instructions but i can not plot the small signal current gain in the ac condition to find fT. And then, I also can not plot fT vs Ic. So can you please give me some details information to simulate it? step by step if you have time.
Thank you so much. :-D:-D:-D:-D:-D:-D:-D:-D