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I don't think it's a tri-state output with mosfets turned off, but just an example.
The (a) part of the figure, at left, suggest that both MOSFETs are in active region, acting as constant current sources.
Resistance at the node is very high (ideally infinite) as for any constant current source. (But if the two currents are not exactly the same, one of the transistors goes into linear region.)
The above symbols on the right side of the figure I usually see in the related literature of ASIC designs when referring to the symmetrical configuration of the n-p pairs in an inverter. Anyway, on this case I would not expect a high impedance on output. Perhaps OP missed relevant information about the context on which this circuit were applied.
In my mind the connection to high impedance reminded me of the description of a tri-state bus driver. The output is either high, or low, or high impedance.
A bus driver needs to operate in that unusual way. If it were a conventional logic device then the output is either high or low.
The term "half-bridge" is dedicated to power electronics, it's unusual for the description of VLSI output drivers. Unlikely that it's used in your text book.
Modeling the push-pull respectively tri-state driver with current sources seems inappropriate, usually the transistors are operated either in off-state or ohmic region, not saturated. Or is it at model of leakage currents of the tri-stated driver?
All right. But the only way in which the node is a high imedance node, as said in the caption of the figure, responding to the model (a), is with both transistors in saturation region.
A load connected at node v0, across which passes the difference of currents (suppose that the voltage so created at that node mantains both mosfets in saturation) "sees" a very high impedance.
Consider it's an example.
A Mosfet is either completely turned on, completely turned off, or halfway. It is confusing to say a Mosfet is "saturated" because that is when it is said to be linear (halfway) and not completely turned on.
The term may be confusing if you refer to the quite different meaning of "saturation" in BJT circuits, e.g. "saturation voltage". But it's a well defined technical term in MOSFET theory and should be understand by anybody.
See a table from Gray, Hurst, Lewis, Meyer Analysis and Design of Analog Integrated Circuits :
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