schematic export failed- calibre

Hi i ran calibre DRC and then when i run LVS i am getting an error "Schematic export failed or was cancelled". I did hierarchial and Layout vs Netlist option. Under the input section of layout every setting was by default and also the netlist tab everything was set and i also checked the "Export from schematic viewer" option. And then ran LVS. Can anyone kindly tell me how to solve this. Thank you!!!

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in inputs section under netlist tab i need to include the src.net file. I saw some tutorials online, all mentioned about only including that file but can anyone pls how i can generate that file.

Go to virtuoso window, maybe there is a option of exporting schematic under file menu. Select CDL.

Uncheck the Export from schematic viewer option. Sometimes it will work.

I unchecked the export from schematic and now i am getting the error "could not read source database file project.src.net"

This is the option i am having. But doing netlist export or layout export i am not able to obtain that src.net file. Or maybe i am just doing it wrong. Could anyone pls help from here.. Thank you for the replies so far!!!

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under the input tab i selected the option "netlist extraction" and i got a file project.sp
I included this file in the input tab under the option "layout vs netlist" and now i am getting error
"nothing in the layout",
"nothing in source",
"corresponding cells could not be identified"
I am also getting a warning "invalid pathchk power ground, no power nets present". Under the LVS options->supply i mentioned VDD and VSS as power pins and GND as ground pin. In my layout i used create->pin and created the pins. Could anyone plssssss help to fix these issues.

I found this in the Calibre Interactive manual; as you are using auCdl, perhaps it will help:
"When using auCdl views, si once again reads the si.env file, but also checks the .simrc file to see what variables are set. If the variables cdlSimViewList or cdlSimStopList are set, they overwrite what you specified in the si.env file. If they are the same, there is no problem; however, if they are different, netlisting fails."

Generate a cdl net list of your schematic using export -->cdl. Uncheck import from schematic and include this file instead. Hope this helps.

i created a separate folder for calibre LVS and when i run LVS i don't get any file of si.env and .simrc files. I only got an si.env file when i do LVS in cadence virtuoso. I understand what you mean by setting the variables to be the same. I has this error once and the variables were different and netlist failed in virtuoso and i my prof cleared it by setting this variables same. But in calibre no files like that are being generated. I also tried export-> CDL but for some reason i am just getting 'Analysis job failed"... I had a schematic netlist file for virtuoso and i included that file for calibre. Still getting the same error. I would atleast like to see if calibre could give me "Netlist dont match"... But i am only getting "No design compared"..thank you!!!!.

It sounds like you are running Calibre LVS without a schematic viewer when this error occurs? (And not only without the viewer, but in a different directory than the files were created in.) I'm not surprised schematic export fails, then. If you take a look in the manual at "Setting Layout and Schematic Export for Interactive Operation" (may be worded differently in older versions), you'll see one of the prerequisites is that the design is open in a viewer.

The si.env and .simrc files are not part of stand-alone Calibre -- they exist solely as glue between it and Cadence Composer.

If the other directory still has the netlist that was exported from the schematic viewer, copy that over to the non-viewer directory, then change the Calibre Interactive "Export from schematic viewer" in the Inputs > Layout tab. (The netlist must be in Verilog or SPICE.) There may be some other things you'll want to change -- see the section called something like "Reading Source Netlist Data from File" in calbr_inter_user.pdf.