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Problem of using CREE SiC MOSFET Model in PSPICE

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Sciebou

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Hello,

I start to work on modeling of SiC based converters and need to have reliable model of SiC MOSFET in Pspice. I found a CREE model of SiC MOSFETs C2M0080120D on the following website: https://github.com/goose1987/little..._MODEL/C2M0080120D/C2M0080120D - Die Beta.lib

However, after importing this model in Pspice, the simulation of this model is blocked because of many following errors:
error_Pspice.png

Do you have ideas to troubleshoot it?
Many thanks for your advices.
 

Attachments

  • error_Pspice.gif
    error_Pspice.gif
    76.8 KB · Views: 242

The lib file uses B devices, which Pspice understands in form of E,G devices.
I converted the B devices to E,G devices.
The logarithmic "ln" needs to be converted to "log".
After making above changes it simulates successfully.
Attaching the circuit file.
 

Attachments

  • test1.txt
    2.9 KB · Views: 181
Hello mvaseem,
Many thanks for your feedback! The text file effectively works.
Otherwise, my work consists of modeling an electronic circuit with many components and so on. As I'm not used to build circuits with codes. I'm very interested to import .txt file to .lib file so that a new component is available in the library, and I can have a visual illustration of objects in my circuit.
Nevertheless, when I convert the .txt file to .lib file, the execution of my simulation has an error as follows:
**broken link removed**
Can you have a look on this error which occurs when I try to simulate the .lib file? I hope that you will have you have some ideas for me on this point.
Thank you for your help.
 

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    pspicenoob

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Hi Sciebou,

I can't view the attachment. There is some issue with it.
Anyways, you just need to remove the few starting and end lines from text file. These are top level dummy circuit which I created and analysis statements etc.
Basically you just need the subckt definition in lib file.
I am attaching it for you.
Open the lib file in model editor, go to File -> Export to Part Library.
This would generate olb file consisting of the part symbol.
You can use that in your capture schematic just the way you use other symbols.
 

Attachments

  • test1.zip
    1.3 KB · Views: 181
Hi mvaseem,

Thank you very much for your quick answer.
You are right, the picture didn't appear. But you have answered to my question. I tested the .lib file and it works perfectly with a simple circuit.
However, when I add a voltage sweep Vds rising from 0 to 18 as in the figure below:
circuit.png
The simulation still runs but there is a convergence problem:
convergence Problem.png

Then I try to change some values with regards to the solver setting like as it's recommended in the "CREE C2M SiC MOSFET PSPICEMODEL - Quick start guide":
ABSTOL=1e-6 CHGTOL=1e-12 GMIN=1e-9 ITL1=1000 ITL2=1000 ITL4=1000 RELTOL= 0.001 VNTOL=1e-3

Still, it doesn't get better. Do you have ideas or techniques about how to tune the solver setting in order to simulate this model including SiC MOSFET ?
Thank you for your help. I can really appreciate any ideas or techniques that you have on this point.

Best regards
 

I tried this on 16.6 version of Pspice. I enabled auto-convergence option, which provides relaxed values of tolerances for better convergence.
It converged successfully.
I got result as attached -
result.png

- - - Updated - - -

To turn-on auto-convergence option you need to go to options under simulation settings, see attached image -
settings.png
 
Wonderful!

It seems that there isn't an auto-convergence option on the previous versions than 16.6.
But when I tried with the 16.6 version of Pspice.
I works perfectly.

Thank you very much for your kind help.
 

Hello,

I am working on circuit with C2M0080120D also, but I get some unexpected result. My circuit is placed below.

MOdel.PNG

I open the mosfet at 0.3 and close it at 0.6 with 20 V signal. However as you will see below, the mosfet does not close. There is a slight drop of voltage, but it remains open. May I ask, maybe, you had similar problem? I have tried the same circuit with part libarary placed here by mvaseem, and I still get the same problem. Maybe someone knows how can it be fixed?

Grafikas.PNG
 

Very bad circuit with unclamped inductive load, driving the FET into avalanche breakdown.
 

Hello,

I have again a convergence problem with the simulation of the following circuit including C2M0080120D model:
Circuit's topology:
rectifier_circuit.png
Error message:
error_convergence_2.png

I have adopted the auto-convergence option like in mvaseem's messages above. Still, the convergence problem persists:
error_convergence.png

Otherwise, the same circuit works with another MOSFET model in the library. Could this problem come from the C2M0080120D model?
Do you have some ideas to troubleshoot the convergence problem with this circuit simulation including C2M0080120D MOSFET?

Thank you very much for your help!
 
Last edited:

Going by your observations the convergence issue might be coming from C2M0080120D.
There is no straightforward method to resolve all convergence problems. It's a very tricky area.
Sometimes it can be worked upon by tweaking simulator options. Many times user needs to make minor changes in design by following the messages thrown by simulator. You need to pay attention to nodes/devices showing high voltage/current swings.

Can you attach the design. I can give it a try.
 
Hi mvaseem,

Thank you very much for your information.
I send you in the attached file my simulation.

Sciebou.
 

Attachments

  • PFC.zip
    90.1 KB · Views: 158
Last edited:

Hi Sciebou,

I am getting the undefned subckt for block U16.
Looks like you need to attach one more lib file defining subckt - IR2111.\
 

Hi mvaseem,

Sorry for this! You can find attached the missing files for IR2111.

Thank you for your help!

Sciebou.
 

Attachments

  • IR2111.zip
    2 KB · Views: 139

There is no simple way to get this converge.
I had to use CSHUNT option to achieve convergence. I used cshunt=1e-13.
Chsunt option actually adds capacitance to each node of the circuit. This helps in smoothing the sharp edges which typically leads to convergence issues.
Since it adds capacitances to design thus changing it's topology, it should be used with caution.
Simulation results should be verified with theoretical calculations.

You can further try experimenting without using this option and adding small capacitance to selected nodes.
 

Hi mvaseem,

Thank you very much for your feedback. I used CSHUNT option with a value of 1e-13, but it hasn't converged yet.
May you send me the simulation that you modified so that I can have a test?

Thank you very much.
Sciebou.
 

Hi Sciebou,

Attached is the design. I just used cshunt option. Rest is same.
I am using pspice release - 16.6 latest ISR.
 

Attachments

  • PFC_mod.zip
    57.4 KB · Views: 149

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