Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

fft ip core help needed

Status
Not open for further replies.
S

saqib49

Newbie level 6
Newbie level 6
Joined
May 9, 2011
Messages
14
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,385
i wants to join fft ip core block and inverse fft block in schematic view.. then wants to apply some input and gets same output after inverse fft.

pin layout in data sheet of fft ip core and pin layout in schematic symbol is different .. so basically i wants to know that, how to use fft ip core in xilink ise
 

What's the problem with assigning the o/p of fft core to the i/p of ifft core during port mapping.

Pin layout in the gui,it shows only ports that you are going to use based on your settings in the gui,but there is an option to show disabled ports as well(atleast Vivado has it,ISE i'm not sure)
FFT ip core:
Capture.JPG
Xilinx Manual:
Capture1.JPG
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top