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Digital Design of Integrator

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njr@1

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Dear all,

I wanted to how is the Integrator designed digitally ?
Does it have a loop or just a feed forward structure ?

Thank you
 

Every new sample is registered and accumulated to the history of older samples.
T(x) - x is the number of clock cycle.

at T(0)
Integrated result = sample_0

at T(1)
Integrated result = sample_1 + sample_0

at T(2)
Integrated result = sample_2 + sample_1 + sample_0

And so on...
 
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