Up-Down Counter sequence

Hello, I have to do a counter which make a sequence and when I get to the top do the reverse. For example, the counter has to do the next sequence: 7 - 3 - 1 - 5 and when it get to the last one do the next 5- 1 - 3 -7 and when it get the last one do 7- 3 - 1 - 5 .....

I thought I must do 2 counters, one with the sequence (7-3-1-5) and the other with (5-1-3-7):

Using FF type D the first sequence is D3= Q2' D2= Q3 D1=1

And using FF type D the second sequence is D3= Q2 D2 = Q3' D1=1.

I did it by separate but I do not know how to unite them. Or maybe there is a way to do just one counter and with logic gates make the oposite sequence. Can you help me?

I did not find a sample or how to do it in the books or in internet. I have Digital Systems: Principles and Applications by Tocci

I think you are mixing up terms like counter and state machine. Both use registers or FF's

Unless I misunderstand you ... maybe you want a pulse dial phone that sequences bursts of pulses using numbers in forward and reverse sequence but it doesn't sound like you want a counter, but some count is needed for your state machine for a sequence of 4 parallel bits in BCD.

Hi,

I think you need a sequence like this 7-3-1-5-1-3-7.

You need to generate count_up (4th bit) to design this counter.
So basically 4 FFs are required, 3 for count value output and 1 for count_up.
Count_up is set (1) when count value reaches to 5 and reset when count value reaches to 7.

inputs outputs
count_up count count_up count
0 111 0 011
0 011 0 001
0 001 0 101
0 101 1 001
1 001 1 011
1 011 1 111
1 111 0 011

Now by using 4 input K-map, you can get the equations.