owen_li
Full Member level 3
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Hi.
I just had a question about the cross clock domain capture issue in DFT.
As we know, we can insert a lockup latch on the scan chain who is crossing the clock domain, to ease the hold timing fix.
But how to hanle the capture path which is asynchronous from clock domain A to clock domain B ?
This path is asynchronous in function mode but it is synchronous in DFT mode.
coz the clock skew is very indeterministic between these two clocks in DFT mode, the hold violation is very hard to fix and also it is needless.
Thanks!
I just had a question about the cross clock domain capture issue in DFT.
As we know, we can insert a lockup latch on the scan chain who is crossing the clock domain, to ease the hold timing fix.
But how to hanle the capture path which is asynchronous from clock domain A to clock domain B ?
This path is asynchronous in function mode but it is synchronous in DFT mode.
coz the clock skew is very indeterministic between these two clocks in DFT mode, the hold violation is very hard to fix and also it is needless.
Thanks!