Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have taken an open source code from this **broken link removed** link, but i'm not knowing how to read/write text file in VHDL and getback an image in matlab. Please help me.
Seems like you want to do this as part of a testbench? I'm assuming you know that VHDL is a hardware description language and you can't synthesize file I/O operations into hardware.
Regardless of your intent...You could have used google like I did: "vhdl file io example"
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.