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Layout differential pair - Dummies.

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AMSA84

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Hi guys. Can someone tell me how to insert dummies in the layout for the differential pair bit taking into account the LVS check?
 

yes if you insert dummy means you should add equivalent schematic instances and connect it as same as your layout

LVS takes this into account.

LVS takes these devices as normal devices it doesn't know these are dummies.
 
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That was what I though. However this is suitavle for a 500MHz frequency? Por até this frequency onde ahould avoid the dummies in the layout? At least in the components that processo the 500MHz signal. For example in the transistors that bias the blocks, se can use dummies without any problemas, right?

To finish, how onde can connect the dummies for the differential pair in the schematic? Source and gate from the dummie to VDD and the drain to the drain of the transistor from the differential pair?

TKS in advance.
 

Actually Dummies are used to protect your devices from stress effect and other undesirable effects.

And it helps to improve your frequency response of the circuit.

In general Dummies for Nmos , connect all the terminals and connect it to your bulk that is gnd.

For Pmos connect all the terminals and connect it to supply that is vdd.

Actually dummies dont share any connection with active circuits.

and bias blocks yes you are right. But it is also used to improve matching so that you are using it while matiching.

thanks
 
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Thank you so much for the info kenambo. That was really helpfull.

So, in my case, I am designing an OTA with PMOS differential input transistors. In this case I should connect two PMOS (with all connections connected together) and then connect them to VDD. Ok. But in the layout I will have to do the same, that is, I will have to connect that single transistor to VDD too? You said that they don't share connection with active circuits, but to put them together with the active components, in this case with the diff. pair, they'll share the same diffusion right?

Can you make a drawing?
 

yeah i mean it wont share any connection to the pins except VDD or GND.

see the image

Actually you should use two dummies at the end of your matched devices.. if your circuit is affected by stress effect means you can use dummies at the perimeter of your matching.

and you connect S D G to Vdd for PMOS and S D G to gnd for nmos..

hope you use Guardring around your PMOS matched device for better isolation.

thanks
 

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Dummies are essentially for matching purpose.They are not connected to actual circuit but they occupy a space to improve the matching by adding extra doping/active areas.
Large areas are much better in term of matching and uniformity of the doping.
 

Thanks!!!
Kenambo, and what about an image where you can illustrate how to make the connection in the schematic?

I presume that the dummies that you are illustrating in the image have their source and drain and gate connected to VDD,right? But tell me, imagine the two dummies in the left. DS DS. This las source is shared with the actual differential pair mosfet M1. But how can I connect the source of the dummie to VDD if the Source of M1 needs to be connected to the bias transistor?
 

No actually dummy MOS should be drawn seperatedly from active devices then you can connect all the terminals in layout as in schematic.

Dummies are for better matching and avoid undesirable stress effects.

see the image

thanks
 

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Okay kenambo. However, can you answer to the other question? Here:

yeah i mean it wont share any connection to the pins except VDD or GND.
Click to expand...

If the dummies can't share the connection with active devices, except for VDD or GND tell me, imagine the two dummies, in the picture you posted before, in the left. DS DS. This last source is shared with the actual differential pair mosfet M1. But how can I connect the source of the dummie to VDD if the Source of M1 needs to be connected to the bias transistor?

- - - Updated - - -

I can't reach to the point. I don't have any idea how to apply those dummy transistors a cascode current mirror and the differential pair. I mean, to all the sub-blocks.
 

Hi

you have to put dummies apart from your circuit that means no need to share your source with any mofet .. it is seperated from the device that means S not overapped with the biasing MOS.

Actually we can do layout without merging too.. but it is not a effective layout.

Dummy is for better matching and it may be drawn without merging and it is easy for you to connect it with VDD...

thanks
 
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