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hi friend,
I think - input pin capacitance is used for calculating capacitance of net which connect to the cell in design. total net cap = output cap of pin + net alone cap + cap at input pins which the net connect to.
I often see in library that the cap of an input pin is 0. (maybe due to structure of sdt cell, input cap is small,...just I think, not sure it's right)
Input Pin Cap : it is load offered by the pin to the outside world. It consists of metal cap, gate poly cap. And the input cap of a pin CANNOT be zero. If the input cap is zero or not available, it is wrong.
The input pin capacitance is the cload offered by the gate when STA is done. Example if there is a path which has two inverter A and B between flop F1 to flop F2. there is a third gate And gate whose input is connected to the output for inverter A. when analyzing the path from F1 to F2. Only inverter A/B are important for the path but inverter A is also getting loaded by the AND gate. this load is pin cap of the input of AND gate
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