forast
Junior Member level 3
I have a module for a bidirectional memory but I need to get it working with non-bidirectional lines. I'm thinking this is simple but I'm stuck. Here's the module
Should i make the inout into something like:
Please let me know if i'm on the right track and any help is appreciated.
Code:
module ram16x4(
input [3:0] address,
inout [3:0] data,
input ce, we, oe
);
reg [0:15] [3:0] memory; //16 x 4 RAM
assign data = ~ce & we & ~oe ? memory[address] : 4'hz;
always@(*)
begin
if (ce == 0)
if (we == 0 && oe == 1)
memory[address] = data;
end
endmodule
Should i make the inout into something like:
Code:
input [3:0] in
output [3:0] out
assign in = ~ce & ~we & oe ? memory[address] : 4'hz;
assign out = ~ce & we & ~oe ? memory[address] : 4'hz;
Please let me know if i'm on the right track and any help is appreciated.