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Does silk screen affect vias on the board?

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at89atbits

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Hi,
I am getting a stop mask error for placing a via on the tplace layer of another component.
But I dont need to solder anything on the via.
So do I need to change the placement of the via or placing the via on the silkscreen won't be a problem.
I am attaching an image of the error for reference. ERROR STOP MASK.jpg
 

Hi,
There is no issue with placing silk over via, if there is solder mask : it should be the case because you say that you have nothing to solder on it.
But if you have a soldermask opening, usually the fab will remove any silk over solder mask opening.

regards
 
No problem whatsoever. The fabrication house shall take care of it.
Hoping the EMI is taken care of around the via.
 

when you placed silkscreen on vias. it will drilled out. Better to move silk screen text (refdes) from vias, except silk lines.
 

Another option can be to tent the via, this will cover it completely with solder resist, and there won't be any problem printing on it. However, this of course will make it impossible to use the via as a test point during PCB debugging.
 

The silkscreen ident does not affect the via, however the reverse is not true.

If you have any drilled hole underneath silkscreen ident then you will not always be able to tell what the ident text says even when it is tented.
It is much better to move it so it is not drilled through.

It is a process during PCB design to go through the silkscreen tidying it up, moving ref names etc away from pads & holes before creating your Gerbers.
Get into the habit of this, just like running a DRC check - tidying your silkscreen is a process in PCB layout.
 
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