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[SOLVED] Problem with Systematic offset / Bandgap circuit

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skoda

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Hi to all great designers !

In allen Holberg I find this page and I see that mathing of two transistor is a point of problem (ie. current density should be equal and I do matching NMOS to NMOS)
Matching.png


I`m trying to make Bandgap ref 1V supply, now I have problem with systematic offset, which I see between Vgs(N_CLl) and VDS( N_CLr). This two voltage should be equal right?

Matching2.png

But in my circuit the second stage is PMOS( P_BGRl) and there is a problem with mathing right? Because I can do same current density but this two device has different threshold voltage. So I try to make current density equal but Im not sure if this is good solution.
 

Change your amplifier to OTA (differential pair loaded by current mirrors) or design it as floded cascode.
 
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    skoda

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Hi dominik,

so in case of OTA ( symmetrical ota) can we write this equation for systematic offset solving?

I. Vgs7=Vds8=Vgs10
and therefore
II, Id7/(W/L)7=Id10/(W/L)10

Systematic.png

Is it correct or is there any other equation? And about folded cascode what condition should be there and how it all work?
 

When You using symetrical OTA You don't worry about matching between any OTA current mirror transistors and driving stage.
In folded cascode case the loading current mirror on pfets (I assuming input pair made also on pfets) should be match to driving transistors.
 

Whenever you use an NMOS Active Load referred to ground to drive a PMOS gain stage referred to VDD you'll have a systematic offset.
Symmetrical OTA is an option or use a 2 stage amplifier (higher DC gain -> better Vp/Vn matching)
 

Well I try it but there is still some 90mV systematic offset, so where is the mistake?
offs.png

( thanks culho, 2 stage amplifier isnt for me right now => stability issue)
 

Vdio - Vout is systematic offset isn't it?

All this stuff about systematic offset start at this picture, where my mentor told me that VGS(NM1)=511mV MINUS VDS(NM0)=339mV is systematic offset.
Konzultace_Sym.Offset.png
 

You can only get rid of systematic offsets if matched devices are operating in the same region. The VDS of the two devices are are not the same but if they are both deeply saturated in strong inversion the IDS current offset is very small. That is why you only see 0.5mV of offset at the input of your diff pair.
 
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Thank you guys again, in the end I use folded cascode topology and everything is better, I like it ! :)
 

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