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what are the major differences in 45nm and 28nm process with respect to layout design

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ms_90

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i know that in case of 28nm poly space effect and OD space effects will come into picture...but rest of this are there any major differences between these two technology nodes?
 

Poly pitch have to be maintained in lower node technology.
No orientation of poly is used.
Special layers such as cut poly is used in lower node technology.
 
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Prashanthanilm said:
Poly pitch have to be maintained in lower node technology.
No orientation of poly is used.
Special layers such as cut poly is used in lower node technology.
Click to expand...


what is the reason behind maintaining poly pitch? can u please explain this in detail?
 

We maintain the Poly pitch in lower node technology due to process effects.

As shrink size is reduce, the chip is more prone to get affected due to process window variation in fabrication.
So, we maintain constant space for poly pitch and the here the process is Dual Pattern Technology .

You can read about Dual Pattern Technology to understand the scenario better.
 
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Prashanthanilm said:
We maintain the Poly pitch in lower node technology due to process effects.

As shrink size is reduce, the chip is more prone to get affected due to process window variation in fabrication.
So, we maintain constant space for poly pitch and the here the process is Dual Pattern Technology .
You can read about Dual Pattern Technology to understand the scenario better.
Click to expand...

i agree with you but i want to know in depth that what kind of process variations will b there....do u have some documents to explain these things? n as per my knowledge for 28nm we dont have any double patterning....
 

You can refer the DRC/DRM rule file for the information on Poly/OD pitch and I believe that the DRM pdf has also info of Dual Pattern .
(TSMC 28nm)
Since, those are Confidential - cannot be shared in Public forum.
 

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