Deepak.akon
Newbie level 6
Can any help me to design a 4 bit counter in vhdl.I want that counter gives 0 for count 0 t0 7 and 1 for 8 to 15.please reply fast
Continue to Site
four_bit_counter : process ( clock ) is
begin
if rising_edge ( clock ) then
counter <= counter + 1 ; -- counter is defined as an unsigned 4 bit vector
end if ;
end process four_bit_counter ;
