How do you measure the output impedance of an OTA in Cadence?

Hello All,

Question is really in the title.

I have a folded cascode single stage OTA. As there are cascodes on the output drivers I am concerned as to
what the Rout of the OTA actually is.

Does anyone have any suggestions as to the correct procedure to measure the output impedance of an
OTA?

As a suggestion, should I place a voltage source at the output and inject a current back into the OTA, can
I calculate Rout by vsrc / iinput? Or something like that?

Thanks and all the best,

Diarmuid

diarmuid said:

As a suggestion, should I place a voltage source at the output and inject a current back into the OTA, can
I calculate Rout by vsrc / iinput? Or something like that?

Click to expand...

Yes - that is the classical method. Use a small-signal ac source and provide the proper biasing (operating point).
The signal input must be grounded during this test (that means: terminated with the normal operating input resisrance).

diarmuid said:

... should I place a voltage source at the output and inject a current back into the OTA, can
I calculate Rout by vsrc / iinput? Or something like that?

Click to expand...

Yes, something like that: the simplest method - I think - is to insert a unit current source (1A) between output and GND, then run an ac analysis and plot output voltage vs. frequency. Z=V/I ; I =1A , so you get directly the output impedance vs. frequency. kV ≙ kΩ .

Hello Erikl,

Thank you for your quick response.

So I have attached a schematic of my testbench.
As you can see I have an ac current source of 1A placed at the output.
Taking the magnitude of the voltage and current outputs and dividing I get
zout as shown in the attached.

Is this correct? Would these values be believalbe for a folded cascode OTA?
Is there a simple way to check if this is correct i.e. with an ideal cap or something?

Thanks,

Diarmuid

diarmuid said:

Is this correct? Would these values be believalbe for a folded cascode OTA?
Is there a simple way to check if this is correct i.e. with an ideal cap or something?

Click to expand...

In post#2 I have mentioned the necessity to ground the signal input and to apply proper biasing.
Therefore, my question: What is the purpose of the 2V input?

I suppose, it is the task of the capacitor at the inverting input node to stop signal feedback, correct?

diarmuid said:

Is this correct? Would these values be believalbe for a folded cascode OTA?

Click to expand...

Actually it seems a bit high, nearly the same as the value of your feedback resistor. I presume your OTA isn't working in a correct OP, may be due to a wrong DC voltage at pin+ , as LvW already mentioned. Just disconnect I103, connect pin+ to nin- and check if your OPs are correct.

Hello guys,

So the purpose of this OTA is simply to buffer a 2V output, hence the 2V input.

I included the 2V input to bias up the OTA as it would see in normal operating conditions. I run
a transient sim prior to the ac sim to ensure correct bias occurs. This shows a 2V output for the
2V input. Therefore, I would presume the normal DC operating point has been reached.

By connecting the pin+ to nin- do I not create an operating condition the OTA will not normally see?

@LvW: Yes, the cap is to create an open loop. In your previous post you mentioned:

"The signal input must be grounded during this test (that means: terminated with the normal operating input resisrance)."

How exactly do I do this with the attached OTA?

- - - Updated - - -

I applied the ac source method to a resistor divider (2 ideal 1Meg resistors). As you can see from the attached, the zout=500k which
makes me more confident of this method.

However, I have 2 questions about this:

1. Why does zout drop with frequency? Circuit consists of 2ideal resistors i.e. no caps at all?
2. It seems the magnitude of the small signal current doesnt matter (as long as it is accounted for
in the V/I calculation. Therefore, what is this current actually doing if it doesnt affect the circuit?

Thanks,

diarmuid said:

I included the 2V input to bias up the OTA as it would see in normal operating conditions. I run
a transient sim prior to the ac sim to ensure correct bias occurs. This shows a 2V output for the
2V input. Therefore, I would presume the normal DC operating point has been reached.

Click to expand...

This tells us the inverting input is @ 2V, too (Av(DC)=1). So I guess at least your input & output OPs should be ok (we don't know your vdda, however). But did you check the internal OPs? All transistors in saturation? Which models do you use?

diarmuid said:

By connecting the pin+ to nin- do I not create an operating condition the OTA will not normally see?

Click to expand...

Depends on your feedback-adjusted gain. As you can see from my answer above, for Av(DC)=1 this does the same as your 2V DC input voltage.

diarmuid said:

- - - Updated - - -

1. Why does zout drop with frequency? Circuit consists of 2ideal resistors i.e. no caps at all?

Click to expand...

Really zout, not vout? Perhaps just a little bit? Like your ac current?

Update:
I just found your 2^nd PDF: Now I really don't know why. May be a default cap. Check the netlist!

diarmuid said:

2. It seems the magnitude of the small signal current doesnt matter (as long as it is accounted for
in the V/I calculation. Therefore, what is this current actually doing if it doesnt affect the circuit?

Click to expand...

For ac analysis, the dynamic OPs of all nodes are linearized, and so are valid for any size of voltages or currents.
Unit voltages/currents are used just for convenience.

Yes, a small parasitic cap was included in the netlist. Without this, 500kOhm results over frequency.

Regarding the below comment:

"For ac analysis, the dynamic OPs of all nodes are linearized, and so are valid for any size of voltages or currents."

Could you expand on this a little please. Are you referring to the fact that all circuits are reduced to their transfer
functions?

Thanks,

- - - Updated - - -

Do you mean by linearising the node, we assume small signal conditions such that the DC bias is set and no AC current can knock
it off this bias point?

diarmuid said:

"For ac analysis, the dynamic OPs of all nodes are linearized, and so are valid for any size of voltages or currents."
Could you expand on this a little please. Are you referring to the fact that all circuits are reduced to their transfer functions?

Click to expand...

Right. Think of any small signal gm or rout slope calculated for the OP linearly expanded to infinity.

diarmuid said:

- - - Updated - - -
Do you mean by linearising the node, we assume small signal conditions such that the DC bias is set and no AC current can knock
it off this bias point?

Click to expand...

That's right!

This is only the case for ac and similar (frequency-dependent) analyses (XF, PAC ...), not for transient.

you can force ac current source at the output and measure the ac voltage at that node. Then you plot over freq. you have the output impedance over freq