Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] A simple mos question

Status
Not open for further replies.

WillMakeItHappen

Newbie level 4
Newbie level 4
Joined
Sep 11, 2013
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
59
Hi all,
A very elementary question but essential: i am mainly used to nmos and when it comes to pmos the textbooks are confusing when it comes to the conditions of saturation. I just want to make sure my understanding is correct: for pmos, saturation means that the gate voltage is higher than the drain voltage right ? (supposing the source is connected to vcc)
Also, the threshold voltage is negative or posiitve ?
 

You are talking about saturation in BJT's not MOSFETs. The Saturation region in MOSFETs is comparable to the Active region in BJTs. The Saturation region in BJTs is comparable to the Linear (ohmic) region in MOSFETs. (Don't ask me why they labeled them that way since it has led to endless confusion among designers ever since). :-?

MOSFETs are fully turned on when the gate-source voltage is sufficiently high (plus polarity for N-MOSFETs and minus polarity for P-MOSFETs) so that a further (magnitude) increase in voltage has no significant effect on the drain-source ON voltage (it's unrelated to the gate-drain voltage). The gate-source voltage needed for this depends upon the design of the MOSFETs. It's typically 10V for standard MOSFETs and 5V (or in some cases 3V) for logic-level type MOSFETs. That is the linear (ohmic) region for MOSFETs.
 
What do you mean by the drain-source ON voltage ? I am talking about MOSFETS, have no experience in bipolar. I know that for saturation there is a condition on vds and on vgs. For n-mosfets vgs-vth should be higher than zero and vds should be higher than vgs-vth. for n-mosfets this implies than the drain voltage is higher than the gate voltage in saturation region. I am just making this conclusion to simplify the debug of my design. I have been trying to make the analogy with p-mosfets but the textbooks confused me. Please clarify. Thanks.
 

Sorry, I misunderstood your question. I'm not sure I understand your statement about Vgs as compared to Vds in the saturation region but it is the same whether it's an N-MOSFET or a P-MOSFET, the only difference being the voltage polarities. Vgs and Vds are both negative for P-MOSFETs, i.e. in the saturation region the gate voltage is more negative than the source, and the drain voltage is also more negative than the source. Does that clarify it for you?
 
For n-mosfets vgs-vth should be higher than zero and vds should be higher than vgs-vth. for n-mosfets this implies than the drain voltage is higher than the gate voltage in saturation region.

Hi,
As you are saying :
For NMOS to be in Saturation Region : Vds => Vgs-Vt ie Vd-Vs=>Vg-Vs-Vt on simplification Vd=>Vg-Vt
So Drain voltage should be greater then Vg-Vt.
Ex: Vd=200mV Vg=700mV and Vt=600mV So Vd (=200mV) is still greater than Vg-vt (=100mv) and hence MOS is in saturation region.
 
Another thing about Mosfet parameters:
The "threshold voltage" is the gate-source voltage where the Mosfet is beginning to turn on with a very low drain-source current or when it is almost turned off. The threshold voltage spec is rarely used in a circuit design. The threshold voltage for a Mosfet has a wide range, some are low and others are much higher even if they have the same part number.
 
Hi,
As you are saying :
For NMOS to be in Saturation Region : Vds => Vgs-Vt ie Vd-Vs=>Vg-Vs-Vt on simplification Vd=>Vg-Vt
So Drain voltage should be greater then Vg-Vt.
Ex: Vd=200mV Vg=700mV and Vt=600mV So Vd (=200mV) is still greater than Vg-vt (=100mv) and hence MOS is in saturation region.

Thank you. So vd is not always greater than vg in saturation (happens only in deep saturation). Can you give me a PMOS example ? thanks

- - - Updated - - -

Another thing about Mosfet parameters:
The "threshold voltage" is the gate-source voltage where the Mosfet is beginning to turn on with a very low drain-source current or when it is almost turned off. The threshold voltage spec is rarely used in a circuit design. The threshold voltage for a Mosfet has a wide range, some are low and others are much higher even if they have the same part number.
How would you know than whether your device is in saturation or not without any information on the threshold voltage ?
 

The IRF540 is a typical ordinary n-channel Mosfet. Its threshold voltage (gate to source) is from 2.0V to 4.0V when its drain to source current is only 0.25mA (it is almost turned off).
It is said to be saturated when it draws a tiny amount of current to a fairly high amount of current because it is operating like a linear amplifier.
If you feed the gate 3V then some of the IRF540 Mosfets will conduct a few mA and others will not conduct. So the threshold voltage can be ignored.

When its gate to source voltage is from 10V to its maximum allowed voltage of 20V then it is turned on as hard as it can go and is said to be linear or ohmic because it behaves like a resistance of 0.044 ohms at room temperature.

The curves of gate voltage vs drain current are for a "typical" device but they are all different. Some draw a fairly high current when the gate is at only a few volts and others draw only a low current when the gate is at only a few volts.

A Mosfet does not have "deep saturation" like a bipolar transistor because the terms "saturation" and "linear" are the opposite.
You can say "deeply turned on" when a Mosfet conducts hard like when a bipolar transistor is "saturated".

A P-channel Mosfet is the same as an N-channel Mosfet except the voltage polarities are reversed.
 

Hi,
For PMOS to be in Saturation Region : Vsd => Vsg-|Vt| ie Vs-Vd => Vs-Vg- |Vt| on simplification -Vd => -Vg-|Vt| ie Vd <= Vg+|Vt|
So Drain voltage should be less then Vg+|Vt|.
Note : Here Vt is negative
Ex: Vs = 1.8 V Vt=-600mV Vg=1V So Vd <= 1 + |-600mV| <= 1.6V So Drain voltage should be less than 1.6V for this MOS to be in saturation.
So Vsd=200mV Vsg=800mV Vt=600mV Here Vsd (200mV) = Vsg(800mV) - |Vt(-600mv)|
 
Hi,
For PMOS to be in Saturation Region : Vsd => Vsg-|Vt| ie Vs-Vd => Vs-Vg- |Vt| on simplification -Vd => -Vg-|Vt| ie Vd <= Vg+|Vt|
So Drain voltage should be less then Vg+|Vt|.
Note : Here Vt is negative
Ex: Vs = 1.8 V Vt=-600mV Vg=1V So Vd <= 1 + |-600mV| <= 1.6V So Drain voltage should be less than 1.6V for this MOS to be in saturation.
So Vsd=200mV Vsg=800mV Vt=600mV Here Vsd (200mV) = Vsg(800mV) - |Vt(-600mv)|

Thank you Skamthey! now i understand everything!

- - - Updated - - -

No.
You are talking about a saturated bipolar transistor, not a Mosfet amplifier.
When a Mosfet is saturated then it is NOT TURNED ON HARD!

Audioguru, yes Mosfet is turned on hard in saturation..
 

Audioguru, yes Mosfet is turned on hard in saturation..
No, you are wrong. Look at Mosfet modes in Google:
1) When it is turned on hard it is in the Linear or Ohmic mode.
2) When it is an amplifier then it is in the Saturation mode.

The modes are the opposite to bipolar transistors.
 

It is confusing - I tend to use the terms "switch mode" for when it is turned on hard, and, unfortunately, sometimes call it "linear mode" when using it as a linear amplifier - it is hard to avoid using BJT terms.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top