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[SOLVED] What is via stacking?

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venugopala_0202

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Hello

What exactly is via stacking?? Why is it done? Why is there a constraint on the max number of vias that can be stacked? Is via stacking advantageous or disadvantageous?
 

Vias directly above on one another are called as stacked vias.
For yield purpose there will be limit in tech file.
 

I believe that current flow is better in stacked vias.
 

Stacking of VIAs has lot of disadvantages from Process point of view. Generally its done in power mesh. Top power straps will be in higher metal level and hence to supply power to standard cell pre-routes (mostly it will be in M1 or M2) a intermediate metal (M6 - M3) will be partially used for power. This is done to avoid max stack of VIA rule.
 

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