using atmega with SMPS Buck converter circuit

Hey every one

All assistance will be appreciated here
i am building a buck converter(step down) to output certain voltages for a particular application ..
the atmega is giving the switching element(mosfet) in the circuit a pulse width modulated signal which determines the duty cycle.
my output works as expected.
the problem lies with when im changing my load resistance, the voltage changes uncontrollably... i need this to be constant.
how do i go abwt keeping it const i.e when set to 4.3V or 2.2V .. it remains when i change the load R from (100ohms to abwt 10k ohms)
a hint was given to me abwt a feedback system. im confused right there.
Im using one of my ADC pins as input from a variable pot which changes the duty cycle via OCR0 register.
this feedback would have to be used with another ADC pin maybe ADC1? .. and i wud have plenty problems sampling two signals at thhe same time only have experience with sampling one signal ...


Input Cond
Vin = 5V
I in = 500mA

thank you in advance

sample one signal, then sample the other - no need to do both at the same time

You NEED feedback else it is just a variable Duty Cycle device!

you can use the analog comparator of the avr ... this is the fastest way to check the feedback voltage and set the pulse width necessary to regulated the output voltage... then use fet transistor for powerful current range..

jimson .. im getting there, im going abwt setting up the AVR comparator ... with internal band gap reference i.e 2.56V
this wont interfere with the ADC reference selection?, becus im using AVCC for the ADC

Again this is what yu said .. "set the pulse width necessary to regulated the output voltage" <<< im kinda not sure how i will do this ... what code will i need to alter or which register will i be working with...??
i feel like im getting there i jus need this feedback to work and concentrate on the rest of my project ...
this is literally holding most of the other work back.

you need to add code............

if |delta V| > z
{ if Delta V is + then decrease D.C.
else increase D.C. /* as Delta V is - */
}


where z is the tolerance for regulation

Your pot will be tied to the Vref and the output of the pot the comparison voltage.

thank yu cam for there i can understand the algorithm ... but alot of forums on net use C as their prog lang ...
im stuck with using assembler code ...
Now
heres a pic of my circuit ... maybe yur replies/help will be more on point

phele said:

.. maybe yur replies/help will be more on point

Click to expand...

how do you mean? sorry if my replies are not exactly what you want. I am trying to guide you - otherwise how will you learn.
Anyways this is my last reply.

It should be fairly straightforward to take psuedo code and write it in Assembler.

kam

im really trying all my best ... and believe me want to learn!!!

did yu see the image i attached on ma previous reply?
a circuit diagram that shows one of my projects.

Rcell is actually a battery cell. Its equivalent resistance is the internal resistance in the milliohm range (0.1ohms)
When charging up this cell, the voltage across it will increase from abwt 1.1V to abwt 1.6/1.7V ... another problem lies when iv set a particular Vout = 1.2V initially
The comes a point where Vout = Vcell and there wont be any current flowing through the cell. Thereby not fully" charging the cell. i need a mechanism that will measure Vcell and increase Vout accordingly until the cell is fully charged .
Theres a method called Negative Delta V when charging secondary cells. and that is when the cell is fully charged. it will tend to discharge and this will invoke a negative or rather a drop in voltage. by this detection the converter will disconnect from the cell.

so in essence its not only the feedback problem i have . its also this change in Vout i need to implement

kam yu seem to have a huge idead with this . yur assistance will be appreciated.
coding will not be a problem for me ,,, guidance in the right path is wat i need.
thank yu