Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[SOLVED] PG opens in Encounter

Status
Not open for further replies.
E

eeStud

Member level 1
Member level 1
Joined
Feb 17, 2011
Messages
37
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,527
Hi,
I am running P&R with Encounter, and after adding power stips, and check geometry & connection, i am getting lots of dangling wires in M1 rows, and unconnected pins for IO pads on M4. also VSS & VDD as opens.

I am attaching a picture of the opens and my floorplan script.

Will be glad to get any help pls.

Thanks.

1.JPG2.JPG

Code: 
setPreference BlockSnapRule 2
setPreference GuideSnapRule user-define
setPreference ConstraintUserYGrid 0.01
setPreference ConstraintUserXGrid 0.01

floorPlan -d 5000 5000 100 100 100 100
     
getIoFlowFlag

snapFPlanIO -userGrid

globalNetConnect VDD -type pgpin -pin VDD -inst * -module {}
globalNetConnect VSS -type pgpin -pin VSS -inst * -module {}

globalNetConnect VSSC -type pgpin -pin VSSC -inst * -module {}
globalNetConnect VDDC -type pgpin -pin VDDC -inst * -module {}

globalNetConnect VDD -type tiehi -module {}
globalNetConnect VSS -type tielo -module {}

snapFPlanIO -userGrid

addRing \
           -spacing_bottom 1.8 \
           -width_left 6 \
           -width_bottom 6 \
           -width_top 6 \
           -spacing_top 1.8 \
           -layer_bottom M5 \
           -center 1 \
           -stacked_via_top_layer TOP_M \
           -width_right 6 \
           -around core \
           -jog_distance 0.56 \
           -offset_bottom 0.56 \
           -layer_top M5 \
           -threshold 0.56 \
           -offset_left 0.56 \
           -spacing_right 1.8 \
           -spacing_left 1.8 \
           -offset_right 0.56 \
           -offset_top 0.56 \
           -layer_right TOP_M \
           -nets {VDD VSS} \
           -stacked_via_bottom_layer M1 \
           -layer_left TOP_M

addStripe \
    -block_ring_top_layer_limit M5 \
    -max_same_layer_jog_length 0.88 \
    -padcore_ring_bottom_layer_limit M3 \
    -set_to_set_distance 300 \
    -stacked_via_top_layer TOP_M \
    -padcore_ring_top_layer_limit M5 \
    -spacing 1.8 \
    -merge_stripes_value 0.56 \
    -layer M4 \
    -block_ring_bottom_layer_limit M3 \
    -width 3 \
    -nets {VDD VSS} \
    -stacked_via_bottom_layer M4


addStripe \
    -block_ring_top_layer_limit TOP_M \
    -max_same_layer_jog_length 0.88 \
    -padcore_ring_bottom_layer_limit M4 \
    -set_to_set_distance 300 \
    -break_at_selected_blocks 1 \
    -stacked_via_top_layer TOP_M \
    -padcore_ring_top_layer_limit TOP_M \
    -spacing 1.8 \
    -merge_stripes_value 0.56 \
    -direction horizontal \
    -layer M5 \
    -block_ring_bottom_layer_limit M4 \
    -width 6 \
    -nets {VDD VSS} \
    -stacked_via_bottom_layer M4


addStripe \
    -block_ring_top_layer_limit TOP_M \
    -max_same_layer_jog_length 0.88 \
    -padcore_ring_bottom_layer_limit M5 \
    -set_to_set_distance 300 \
    -stacked_via_top_layer TOP_M \
    -padcore_ring_top_layer_limit TOP_M \
    -spacing 1.8 \
    -merge_stripes_value 0.56 \
    -layer TOP_M \
    -block_ring_bottom_layer_limit M5 \
    -width 6 \
    -nets {VDD VSS} \
    -stacked_via_bottom_layer M4

  addIoFiller -cell pfeed30000 -prefix pfeed
  addIoFiller -cell pfeed10000 -prefix pfeed
  addIoFiller -cell pfeed02000 -prefix pfeed
  addIoFiller -cell pfeed01000 -prefix pfeed
  addIoFiller -cell pfeed00540 -prefix pfeed
  addIoFiller -cell pfeed00120 -prefix pfeed
  addIoFiller -cell pfeed00040 -prefix pfeed
  addIoFiller -cell pfeed00010 -prefix pfeed

  sroute \
    -connect { padPin } \
    -layerChangeRange { M1 TOP_M } \
    -blockPinTarget { nearestTarget } \
    -padPinPortConnect { allPort oneGeom } \
    -checkAlignedSecondaryPin 1 \
    -allowJogging 1 \
    -crossoverViaBottomLayer M1 \
    -allowLayerChange 1 \
    -targetViaTopLayer TOP_M \
    -crossoverViaTopLayer TOP_M \
    -targetViaBottomLayer M1 \
    -nets { VSS VDD }

sroute \
    -connect { blockPin corePin } \
    -layerChangeRange { M1 M4 } \
    -blockPinTarget { nearestRingStripe nearestTarget } \
    -checkAlignedSecondaryPin 1 \
    -blockPin useLef \
    -allowJogging 1 \
    -crossoverViaBottomLayer M1 \
    -allowLayerChange 1 \
    -targetViaTopLayer TOP_M \
    -crossoverViaTopLayer TOP_M \
    -targetViaBottomLayer M1 \
    -nets { VSS VDD }

- - - Updated - - -

(solved and can be deleted - thanks.)
 

Rather than delete, why not post the solution, in case someone else has the same problem?
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top