ireon
Junior Member level 2
I designed an UART interface based on the protocol RS-232 using the VHDL code. The interface receives data and trasmits them. It works correctly, but I have a problem about the syncronization of the trasmission speed. The interface works with 4 different levels of baud rate: 9600, 19200, 38400, 57600. They can be select using the bottoms on the FPGA. Using Realterm setting one of these values, the interface works correctly, but for example if I set 9600 baud rate on the interface and for example 1200 baud rate on Realterm the interface doesn't work. I thought to solve the problem using a states machine with the following process:
In this way every time that there is a new date, the counter that selects the speed is reset with the reset_count signal. Anyway if for example I send the byte: "11010010" when there are two 1 or two 0 the counter increases itself up to the reset value( if I selected 57600 baud rate it reset itself when it has reached the value 868, considering the clock period of 20 ns). This creates a problem on the date. How could I resolve the problem? I should determine when there is a new input date so I could reset the counter every time and syncronize the speed.
process(clk,reset,current_state,rx_date,ce)
begin
if reset='1' then current_state<=uno;
elsif clk='1' and clk'event then current_state<=next_state;
end if;
case current_state is
when zero=> reset_count<='0';
if rx_date='1' and (ce and not reset)='1' then reset_count<='1';
next_state<=uno;
else next_state<=zero;
end if;
when uno=> reset_count<='0';
if rx_date='0' and (ce and not reset)='1' then reset_count<='1';
next_state<=zero;
else next_state<=uno;
end if;
when others=> reset_count<='0';
next_state<=uno;
end case;
end process;
In this way every time that there is a new date, the counter that selects the speed is reset with the reset_count signal. Anyway if for example I send the byte: "11010010" when there are two 1 or two 0 the counter increases itself up to the reset value( if I selected 57600 baud rate it reset itself when it has reached the value 868, considering the clock period of 20 ns). This creates a problem on the date. How could I resolve the problem? I should determine when there is a new input date so I could reset the counter every time and syncronize the speed.