Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

length matching guidlines

Status
Not open for further replies.

patilpradeep

Junior Member level 1
Junior Member level 1
Joined
Apr 4, 2013
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,364
Hi All,

is it important to match length of address signal with data signals for Flash & PROM interfaces????
 

Hi,

I suggest you to go with the design guidelines provided by the manufacturer.

Regards
Anil

Hi Anil,

In the datasheet I am not able see any length matching guidlines. So Pls suggest me how can I go ahead....
If you have any general guidlines then Pls share with me.


Regards,
Pradeep
 

If your operating freq is very less or it is async interface then u dont need length matching
 
its operating at 50MHz, can i do length matching or no???
 

May not be required.Just check the setup and hold margins from the datasheet..
 

May not be required.Just check the setup and hold margins from the datasheet..

thanks sivamani,

I have one more question , some the traces are traveling bellow the SMD oscilator in my design. is this ok or not?
 

Without a ground layer in between? Not good design practice. The oscillator may introduce noise on the signal line or the signal line may interfere with the oscilator...
 

could you please let me know ur layer count , stackup order and in which layer it is routed..As for Ice-Tea suggested there should be some isolation to avoid noise pickup..
 

could you please let me know ur layer count , stackup order and in which layer it is routed..As for Ice-Tea suggested there should be some isolation to avoid noise pickup..

12 lyr Board. signals are traveling in 3rd layer(inner) & 2nd layer is Ground plane.
 

In that case there will be any issue,because it is isolated with the GND plane.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top