gourang
Newbie level 4
![Newbie level 4](/styles/images/ranks/blevel1.gif)
i want to synthesize a design consisting of 6 cascaded inverters , when i type the command synthesize -to mapped its eliminating all inverters . please tell me how to avoid this problem. all i want is 6 cascaded inverters synthesized....![Stick out tongue :p :p](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)