giri_lp
Member level 3
![Member level 3](/styles/images/ranks/dlevel3.gif)
Hi All,
Recently I had this question in an interview.
Request is 1 bit input to the DUT and grant is 1 bit output from the DUT. Design is when request goes high, ack has to follow request and should go high within 64 cycles. Similarly when request goes low, ack should go low within 64 clock cycles.
The interviewer asked me to give a plan to check this functionality and he did not want scenarios to be listed.
Pleas help me answer this.
Recently I had this question in an interview.
Request is 1 bit input to the DUT and grant is 1 bit output from the DUT. Design is when request goes high, ack has to follow request and should go high within 64 cycles. Similarly when request goes low, ack should go low within 64 clock cycles.
The interviewer asked me to give a plan to check this functionality and he did not want scenarios to be listed.
Pleas help me answer this.