VHDL Function for converting Decimal to binary

Hello Dears

I want to use the R, G and B values of an image as an input of my design. The values of matrix are between 0 and 1. Is there any VHDL function to convert the values of a matrix to 32 bits binary number? matlab do it just for whole part ( without considering fraction part) by dec2bin. For instance, For numbers between 0 and 1 "dec2bin" always released 0 as output. So is there any way to obtain the binary values?

Regards
Mostafa

everything in VHDL is binary. What exactly are you refering to?

Well I have a matrix that its elements are between 0 and 1 (e.g 0.976) and I want to use it as my design as inputs (my design inputs are 32 bit and fixed point). so i need to convert the matrix values to their binary representation and then use them in the rest of design. So how can i do it? is there any vhdl function that read these decimal numbers and released the binary one?
Regards
Mostafa

Are these values reals (which re not synthesisable) or are they 32 bit floating point values>?

The first point when designing video signal processing would be to chose a reasonable color resolution. No common digital video standard uses more than 3x16 bit, 3x8 is mostly used.

sheikh said:

Well I have a matrix that its elements are between 0 and 1 (e.g 0.976) and I want to use it as my design as inputs (my design inputs are 32 bit and fixed point). so i need to convert the matrix values to their binary representation and then use them in the rest of design. So how can i do it? is there any vhdl function that read these decimal numbers and released the binary one?
Regards
Mostafa

Click to expand...

The answer will depend on just how you 'have' these numbers and whether or not they change. I'm assuming that your numbers are constants. Since you're using fixed point then the conversion is something like this...

x_fixed_point <= to_sfixed(x_real, 1, -31); -- Fixed point signed representation, allows for 1.0
x_fixed_point <= to_ufixed(x_real, 0, -31); -- Fixed point unsigned representation, allows for 1.0...no sign bit required

x_fixed_point <= to_sfixed(x_real, 0, -31); -- Fixed point signed representation, does not allow for 1.0
x_fixed_point <= to_ufixed(x_real, -1, -31); -- Fixed point unsigned representation, does not allow for 1.0...no sign bit required

If my assumption is not correct and the numbers you need to convert are not constants then you're not clearly explaining how you're getting these signals in the first place since a signal would not be 0...0.976.

Kevin Jennings

I agree with Kevin that the IEEE fixed point library can handle the coefficient scaling pretty easily. I still doubt, that's of any practical use to design image processing with 32 bit word width for RGB signals.

With a good scaling factor, you can get rid of the decimals (between 0 and 1). And as FvM suggests, if it is your intention to make your functions synthesizable, 8 bit resolution might be on the low side, but 16 bit video is already on the high side.

Maybe some food for thought: how is your outside world communicating with your FPGA? I doubt if it were decimals between 0 and 1...

thanks Dear all

Dear lucbra: you mean I can get 16 bit for whole part and 8 bit for fraction?

if you can avoid the fractional part, it makes life easier

Thanks Dear Kevin
my numbers are constant.

Thanks Dear FvM
I searched about your advice for using less bits in video signal processing but didn't find any clear reason. I know you and other friends here are expert persons in this area and i am a beginner, so according to your experience, could you please explain more about your comment " I still doubt, that's of any practical use to design image processing with 32 bit word width for RGB signals." what is the practical problem when i use this?

Regards
Mostafa

There's no particular problem except for available FPGA resources and achievable design speed. Just try!