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How to match units with different output rate?

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sheikh

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Hello Dears
I designed two different units, and now I want to use them in one entity. But the speed of producing the result is different in these unit. for instance when first result of the second unit is ready, the first unit made five output. I try to save these five values in registers, but when i want to use the second value of first unit in the second unit, five new values produces by first unit again and if i save them the in the mentioned register i will loss the previous output of the first unit. So what can I do for using these two units with different rate of output in one entity? ( i dont want read one input and then wait for second unit result and read the next input)
Regards
Mostafa
 

I advise that you'd better to put two units into one same unit.
 

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stick the data in a FIFO?
 

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more precisely a dual clocked fifo
 

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more precisely a dual clocked fifo

Only if each block has its own clock - the OP never specified. They could be running on the same clock but have different data rates - that means the OP needs to ensure he consumes all the data in the FIFO so that it never fills up.
 

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Thanks Dear all. as dear TrickyDicky said my units "running on the same clock but have different data rates".
 

Thanks Dear all. as dear TrickyDicky said my units "running on the same clock but have different data rates".

If we refer to the 1st unit as the "fast unit" and the 2nd as the "slow unit".

but when i want to use the second value of first unit in the second unit, five new values produces by first unit again
Considering the clocks are the same for both units and the data rates are different. You've stated the fast unit data output is used by the slow unit as an input, with the difference in data rates this can't be done, no matter how large a FIFO used (as suggested by TrickyDicky) you will eventually overflow.

You have a number of options:
1. change the fast unit to have an enable to stop producing data so it's rate matches the slow unit.
2. change the slow unit so it can match the fast unit data rate.
a. heavily pipeline the slow unit so it has increased latency but can produce data a the fast unit rate.
b. increase the data width in the slow unit so it can process more data at the slow rate.
3. use two different clocks a slow clock for the fast unit and a fast clock for the slow unit.
4. Go back to the drawing board and find a different solution for the fast and slow unit combination as it probably isn't an optimal design.

Regards,
-alan
 
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    sheikh

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Thanks a lot Dear alan. you taught me a lot of things:))
 

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