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Need help about layout in TSMC 28nm technology

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bhagyasree

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Hi,
Presently am working in TSMC 28nm technology. I have few doubts here
--> what is the difference in layers actual Poly and DOP and SR_DOP?
--> are the dummy poly layers fabricated?
--> should we use dummy poly/normal poly for dummy transistors placed around active transistors for minimizing LDE effects?

Thanks in advance

Bhagyasree
 

hello bhagyasree,
Even I am started to work in TSMC 28nm technology.According to me dummy poly are used to avoid etching of main poly.They will not be fabricated.
Do you have some documents regarding 28nm tech because I am feeling very difficulty in exploring.
Thank you.
 

Hi Prashanthanilm,
sorry that i dont have any documents.
Dummy poly used to avoid etching of original poly has to be fabricated right. only then it will be protecting the original poly.and in 28nm dummies are to be used for compensating LDE effects. and what poly mean PO or DPO or SR_DPO is used for dummies?
Thanks,
Bhagyasree
 

Will get back to you.
Documents in the sense not DRM or DFM.Documents which are used to get rough and quick understanding.
Thank you.
 

bhagyasree said:
Hi Prashanthanilm,
sorry that i dont have any documents.
Dummy poly used to avoid etching of original poly has to be fabricated right. only then it will be protecting the original poly.and in 28nm dummies are to be used for compensating LDE effects. and what poly mean PO or DPO or SR_DPO is used for dummies?
Thanks,
Bhagyasree
Click to expand...

Hi bhagyasree,

U are absolutely correct. Dummy poly and dummy transistors are for fabrication purpose. Otherwise they have no meaning. Dummy poly is for protecting the main gate from etching. and Dummy transistors are for couple of protections, one in matching and othercase is in LOD effect.

and coming to poly types.
PO- is regular poly we use
DPO is dummy poly
SR_DPO is poly used for SRAM cells.
all are same but y they are differentiated is for calibre DRC purpose. every kinda poly has its own DRC rules..

Hope u got it :)
 
Hi Schowdary,

In Design Rule file it is mentioned to use SR_DPO for dummies on shared OD and floating gate is also allowed. and is also mentioned that if we use SR_DPO there will not be any active device formation.
can we use normal poly for dummy transistors?
In 28nm gate last process is used where poly is etched and replaced with metal. will the dummy transistor poly gates(SR_DPO) also be replaced by metal? If so how is floating gate allowed in the process?

Thanks,
Bhagyasree
 

Yes.Dummy poly is used for preventing main poly from etching.
Yes they are fabricated.They will be floating.
 

Hi,
I am asking about SR_DPO layer. It is mentioned that it does not form any device.Why is it so? and if we use SR_DPO for dummy transistors will they be replaced by metal during gate last process?

Thanks,
Bhagyasree
 

hello bhagyashree,

As per my knowledge, when we use dummy poly to prevent the etching of original poly, we dont add that poly within diffusion, we put those poly beside of original poly but not in active area. so it will not form any device.

if i am not correct then please correct me....
 

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